KVM: arm64: Use generated FGT RES0 bits instead of specifying them

Now that all FGT fields are accounted for and represented, use
the generated value instead of manually specifying them.

For __HFGWTR_EL2_RES0, however, there is no generated value. Its
fields are subset of HFGRTR_EL2, with the remaining being RES0.
Therefore, add a mask that represents the HFGRTR_EL2 only bits
and define __HFGWTR_EL2_* using those and the __HFGRTR_EL2_*
fields.

No functional change intended.

Signed-off-by: Fuad Tabba <tabba@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20231214100158.2305400-13-tabba@google.com

diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index b0dc3249d5cd7f6d046936c3e72d5017a727649e..bd20d27f1b333c6d30767fbc31a7d8a8a63d8cc1 100644 (file)
--- a/arch/arm64/include/asm/kvm_arm.h
+++ b/arch/arm64/include/asm/kvm_arm.h
@@ -344,34 +344,32 @@
  * Once we get to a point where the two describe the same thing, we'll
  * merge the definitions. One day.
  */
-#define __HFGRTR_EL2_RES0      BIT(51)
+#define __HFGRTR_EL2_RES0      HFGxTR_EL2_RES0
 #define __HFGRTR_EL2_MASK      GENMASK(49, 0)
 #define __HFGRTR_EL2_nMASK     (GENMASK(63, 52) | BIT(50))
 
-#define __HFGWTR_EL2_RES0      (BIT(51) | BIT(46) | BIT(42) | BIT(40) | \
-                                BIT(28) | GENMASK(26, 25) | BIT(21) | BIT(18) | \
+/*
+ * The HFGWTR bits are a subset of HFGRTR bits. To ensure we don't miss any
+ * future additions, define __HFGWTR* macros relative to __HFGRTR* ones.
+ */
+#define __HFGRTR_ONLY_MASK     (BIT(46) | BIT(42) | BIT(40) | BIT(28) | \
+                                GENMASK(26, 25) | BIT(21) | BIT(18) | \
                                 GENMASK(15, 14) | GENMASK(10, 9) | BIT(2))
-#define __HFGWTR_EL2_MASK      (GENMASK(49, 47) | GENMASK(45, 43) | \
-                                BIT(41) | GENMASK(39, 29) | BIT(27) | \
-                                GENMASK(24, 22) | GENMASK(20, 19) | \
-                                GENMASK(17, 16) | GENMASK(13, 11) | \
-                                GENMASK(8, 3) | GENMASK(1, 0))
-#define __HFGWTR_EL2_nMASK     (GENMASK(63, 52) | BIT(50))
-
-#define __HFGITR_EL2_RES0      (BIT(63) | BIT(61))
+#define __HFGWTR_EL2_RES0      (__HFGRTR_EL2_RES0 | __HFGRTR_ONLY_MASK)
+#define __HFGWTR_EL2_MASK      (__HFGRTR_EL2_MASK & ~__HFGRTR_ONLY_MASK)
+#define __HFGWTR_EL2_nMASK     (__HFGRTR_EL2_nMASK & ~__HFGRTR_ONLY_MASK)
+
+#define __HFGITR_EL2_RES0      HFGITR_EL2_RES0
 #define __HFGITR_EL2_MASK      (BIT(62) | BIT(60) | GENMASK(54, 0))
 #define __HFGITR_EL2_nMASK     GENMASK(59, 55)
 
-#define __HDFGRTR_EL2_RES0     (BIT(49) | BIT(42) | GENMASK(39, 38) |  \
-                                GENMASK(21, 20) | BIT(8))
+#define __HDFGRTR_EL2_RES0     HDFGRTR_EL2_RES0
 #define __HDFGRTR_EL2_MASK     (BIT(63) | GENMASK(58, 50) | GENMASK(48, 43) | \
                                 GENMASK(41, 40) | GENMASK(37, 22) | \
                                 GENMASK(19, 9) | GENMASK(7, 0))
 #define __HDFGRTR_EL2_nMASK    GENMASK(62, 59)
 
-#define __HDFGWTR_EL2_RES0     (BIT(63) | GENMASK(59, 58) | BIT(51) | BIT(47) | \
-                                BIT(43) | GENMASK(40, 38) | BIT(34) | BIT(30) | \
-                                BIT(22) | BIT(9) | BIT(6))
+#define __HDFGWTR_EL2_RES0     HDFGWTR_EL2_RES0
 #define __HDFGWTR_EL2_MASK     (GENMASK(57, 52) | GENMASK(50, 48) | \
                                 GENMASK(46, 44) | GENMASK(42, 41) | \
                                 GENMASK(37, 35) | GENMASK(33, 31) | \
@@ -379,12 +377,12 @@
                                 GENMASK(8, 7) | GENMASK(5, 0))
 #define __HDFGWTR_EL2_nMASK    GENMASK(62, 60)
 
-#define __HAFGRTR_EL2_RES0     (GENMASK(63, 50) | GENMASK(16, 5))
+#define __HAFGRTR_EL2_RES0     HAFGRTR_EL2_RES0
 #define __HAFGRTR_EL2_MASK     (GENMASK(49, 17) | GENMASK(4, 0))
 #define __HAFGRTR_EL2_nMASK    0UL
 
 /* Similar definitions for HCRX_EL2 */
-#define __HCRX_EL2_RES0         (GENMASK(63, 25) | GENMASK(13, 12))
+#define __HCRX_EL2_RES0         HCRX_EL2_RES0
 #define __HCRX_EL2_MASK                (BIT(6))
 #define __HCRX_EL2_nMASK       (GENMASK(24, 14) | GENMASK(11, 7) | GENMASK(5, 0))