i2c: tegra: remove master fifo support on tegra186
authorSowjanya Komatineni <skomatineni@nvidia.com>
Tue, 19 Feb 2019 17:28:51 +0000 (09:28 -0800)
committerWolfram Sang <wsa@the-dreams.de>
Sat, 23 Feb 2019 09:28:14 +0000 (10:28 +0100)
Tegra186 does not have master FIFO  control register and instead
uses FIFO control register like prior Tegra chipset.

This patch fixes this and prevents crashing during boot when
accessing FIFO control registers.

Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
drivers/i2c/busses/i2c-tegra.c

index 5a403c3ab66ccaf55b7d8083ed004384f4b60a34..9d097ad2f6dbc9253f25e656eb2c31f4a533a9a5 100644 (file)
@@ -1436,7 +1436,7 @@ static const struct tegra_i2c_hw_feature tegra186_i2c_hw = {
        .has_config_load_reg = true,
        .has_multi_master_mode = true,
        .has_slcg_override_reg = true,
-       .has_mst_fifo = true,
+       .has_mst_fifo = false,
        .quirks = &tegra_i2c_quirks,
        .supports_bus_clear = true,
        .has_apb_dma = false,