arm64: dts: mediatek: mt8186: Add missing clocks to ssusb power domains
authorNícolas F. R. A. Prado <nfraprado@collabora.com>
Tue, 13 Feb 2024 15:02:37 +0000 (10:02 -0500)
committerAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Wed, 14 Feb 2024 09:04:11 +0000 (10:04 +0100)
The ssusb power domains currently don't list any clocks, despite
depending on some, and thus rely on the bootloader leaving the required
clocks on in order to work.

When booting with the upstream arm64 defconfig, the power domain
controller will defer probe until modules have loaded since it has an
indirect dependency on CONFIG_MTK_CMDQ, which is configured as a module.
However at the point where modules are loaded, unused clocks are also
disabled, causing the ssusb domains to fail to be enabled and
consequently the controller to fail probe:

mtk-power-controller 10006000.syscon:power-controller: /soc/syscon@10006000/power-controller/power-domain@4: failed to power on domain: -110
mtk-power-controller: probe of 10006000.syscon:power-controller failed with error -110

Add the missing clocks for the ssusb power domains so that they can
successfully probe without relying on the bootloader state.

Fixes: d9e43c1e7a38 ("arm64: dts: mt8186: Add power domains controller")
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20240213-mt8186-ssusb-domain-clk-fix-v2-1-1f981d35f3fd@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
arch/arm64/boot/dts/mediatek/mt8186.dtsi

index 8f18b0fd690c6d7c2d0f3191e37ac842c673f58e..41c9338957de96a5acb3e688619a33accb19db39 100644 (file)
 
                                power-domain@MT8186_POWER_DOMAIN_SSUSB {
                                        reg = <MT8186_POWER_DOMAIN_SSUSB>;
+                                       clocks = <&topckgen CLK_TOP_USB_TOP>,
+                                                <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_REF>;
+                                       clock-names = "sys_ck", "ref_ck";
                                        #power-domain-cells = <0>;
                                };
 
                                power-domain@MT8186_POWER_DOMAIN_SSUSB_P1 {
                                        reg = <MT8186_POWER_DOMAIN_SSUSB_P1>;
+                                       clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_SYS>,
+                                                <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_REF>;
+                                       clock-names = "sys_ck", "ref_ck";
                                        #power-domain-cells = <0>;
                                };