clk: socfpga: build together Stratix 10, Agilex and N5X clock drivers

On a multiplatform kernel there is little benefit in splitting each
clock driver per platform because space savings are minimal.  Such split
also complicates the code, especially after adding compile testing.

Build all arm64 Intel SoCFPGA clocks together with one entry in
Makefile.  This also removed duplicated line in the Makefile (selecting
common part of clocks per platform).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig
index 3c30617169bfdedd8866d29804e1dae9ef9da071..bc102e0f0be0a3a929a6576d3dd01f9502f216e0 100644 (file)
--- a/drivers/clk/socfpga/Kconfig
+++ b/drivers/clk/socfpga/Kconfig
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0
 config CLK_INTEL_SOCFPGA64
        bool
-       # Intel Agilex / N5X clock controller support
-       default (ARCH_AGILEX || ARCH_N5X)
-       depends on ARCH_AGILEX || ARCH_N5X
+       # Intel Stratix / Agilex / N5X clock controller support
+       default (ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10)
+       depends on ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10

diff --git a/drivers/clk/socfpga/Makefile b/drivers/clk/socfpga/Makefile
index c6db8dd4ab35b5f3e43e0785859b3de2cfa3e044..ebd3538d12de9ba61fde45b8e2065bb07db48694 100644 (file)
--- a/drivers/clk/socfpga/Makefile
+++ b/drivers/clk/socfpga/Makefile
@@ -1,7 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0
 obj-$(CONFIG_ARCH_SOCFPGA) += clk.o clk-gate.o clk-pll.o clk-periph.o
 obj-$(CONFIG_ARCH_SOCFPGA) += clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o
-obj-$(CONFIG_ARCH_STRATIX10) += clk-s10.o
-obj-$(CONFIG_ARCH_STRATIX10) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o
-obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-agilex.o
-obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o
+obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-s10.o \
+                                    clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o \
+                                    clk-agilex.o