arm64: dts: hisilicon: add missing cache properties

As all level 2 and level 3 caches are unified, add required
cache-unified properties to fix warnings like:

  hi3660-hikey960.dtb: l2-cache0: 'cache-unified' is a required property

Link: https://lore.kernel.org/r/20230421223215.115666-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index a57f35eb5ef6054599b7773a9f709f2bdae09871..7e137a884ae555457800439498affbebcd855a78 100644 (file)
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -204,11 +204,13 @@
                A53_L2: l2-cache0 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
 
                A73_L2: l2-cache1 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
        };
 

diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index f6d3202b0d1adb10c0d8822347ea8081565b7f61..872e9c73c4221ebb62d332266cb0a52c82994236 100644 (file)
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -187,11 +187,13 @@
                CLUSTER0_L2: l2-cache0 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
 
                CLUSTER1_L2: l2-cache1 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
        };
 

diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
index 5b2b1bfd0d2a12fea89e8d725822a53f29844d6a..65ddc0698f8285d203a8620b769d4704811fd6e0 100644 (file)
--- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
@@ -212,21 +212,25 @@
                cluster0_l2: l2-cache0 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
 
                cluster1_l2: l2-cache1 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
 
                cluster2_l2: l2-cache2 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
 
                cluster3_l2: l2-cache3 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
        };
 

diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
index 291c2ee3828823eb1c6278556919ce8f12dd8c85..c588848bfdebb2428bd5a4620da7e81e9c92ba21 100644 (file)
--- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
@@ -212,21 +212,25 @@
                cluster0_l2: l2-cache0 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
 
                cluster1_l2: l2-cache1 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
 
                cluster2_l2: l2-cache2 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
 
                cluster3_l2: l2-cache3 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
        };
 

diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
index 8a9436ca253114b7ebf13fb7d21bb0aca914423c..595abe339c5df767f0671273e3ac78c5e560fcde 100644 (file)
--- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
@@ -843,81 +843,97 @@
                cluster0_l2: l2-cache0 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
 
                cluster1_l2: l2-cache1 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
 
                cluster2_l2: l2-cache2 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
 
                cluster3_l2: l2-cache3 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
 
                cluster4_l2: l2-cache4 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
 
                cluster5_l2: l2-cache5 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
 
                cluster6_l2: l2-cache6 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
 
                cluster7_l2: l2-cache7 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
 
                cluster8_l2: l2-cache8 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
 
                cluster9_l2: l2-cache9 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
 
                cluster10_l2: l2-cache10 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
 
                cluster11_l2: l2-cache11 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
 
                cluster12_l2: l2-cache12 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
 
                cluster13_l2: l2-cache13 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
 
                cluster14_l2: l2-cache14 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
 
                cluster15_l2: l2-cache15 {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
        };