iommu/mediatek: Add MT8188 IOMMU Support

MT8188 has 3 IOMMU, containing 2 MM IOMMUs, one is for vdo, the other
is for vpp. and 1 INFRA IOMMU.

Signed-off-by: Chengci.Xu <chengci.xu@mediatek.com>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
Link: https://lore.kernel.org/r/20230602090227.7264-6-yong.wu@mediatek.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>

diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index fe3839bb14f7c043a5918d021ef01473fe3ad4c9..33cfb226d949ed7fb9c5aa29f1c8f6fa00dc2060 100644 (file)
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -170,6 +170,7 @@ enum mtk_iommu_plat {
        M4U_MT8173,
        M4U_MT8183,
        M4U_MT8186,
+       M4U_MT8188,
        M4U_MT8192,
        M4U_MT8195,
        M4U_MT8365,
@@ -1594,6 +1595,51 @@ static const struct mtk_iommu_plat_data mt8186_data_mm = {
        .iova_region_larb_msk = mt8186_larb_region_msk,
 };
 
+static const struct mtk_iommu_plat_data mt8188_data_infra = {
+       .m4u_plat         = M4U_MT8188,
+       .flags            = WR_THROT_EN | DCM_DISABLE | STD_AXI_MODE | PM_CLK_AO |
+                           MTK_IOMMU_TYPE_INFRA | IFA_IOMMU_PCIE_SUPPORT |
+                           PGTABLE_PA_35_EN | CFG_IFA_MASTER_IN_ATF,
+       .inv_sel_reg      = REG_MMU_INV_SEL_GEN2,
+       .banks_num        = 1,
+       .banks_enable     = {true},
+       .iova_region      = single_domain,
+       .iova_region_nr   = ARRAY_SIZE(single_domain),
+};
+
+static const struct mtk_iommu_plat_data mt8188_data_vdo = {
+       .m4u_plat       = M4U_MT8188,
+       .flags          = HAS_BCLK | HAS_SUB_COMM_3BITS | OUT_ORDER_WR_EN |
+                         WR_THROT_EN | IOVA_34_EN | SHARE_PGTABLE |
+                         PGTABLE_PA_35_EN | MTK_IOMMU_TYPE_MM,
+       .hw_list        = &m4ulist,
+       .inv_sel_reg    = REG_MMU_INV_SEL_GEN2,
+       .banks_num      = 1,
+       .banks_enable   = {true},
+       .iova_region    = mt8192_multi_dom,
+       .iova_region_nr = ARRAY_SIZE(mt8192_multi_dom),
+       .larbid_remap   = {{2}, {0}, {21}, {0}, {19}, {9, 10,
+                          11 /* 11a */, 25 /* 11c */},
+                          {13, 0, 29 /* 16b */, 30 /* 17b */, 0}, {5}},
+};
+
+static const struct mtk_iommu_plat_data mt8188_data_vpp = {
+       .m4u_plat       = M4U_MT8188,
+       .flags          = HAS_BCLK | HAS_SUB_COMM_3BITS | OUT_ORDER_WR_EN |
+                         WR_THROT_EN | IOVA_34_EN | SHARE_PGTABLE |
+                         PGTABLE_PA_35_EN | MTK_IOMMU_TYPE_MM,
+       .hw_list        = &m4ulist,
+       .inv_sel_reg    = REG_MMU_INV_SEL_GEN2,
+       .banks_num      = 1,
+       .banks_enable   = {true},
+       .iova_region    = mt8192_multi_dom,
+       .iova_region_nr = ARRAY_SIZE(mt8192_multi_dom),
+       .larbid_remap   = {{1}, {3}, {23}, {7}, {MTK_INVALID_LARBID},
+                          {12, 15, 24 /* 11b */}, {14, MTK_INVALID_LARBID,
+                          16 /* 16a */, 17 /* 17a */, MTK_INVALID_LARBID,
+                          27, 28 /* ccu0 */, MTK_INVALID_LARBID}, {4, 6}},
+};
+
 static const unsigned int mt8192_larb_region_msk[MT8192_MULTI_REGION_NR_MAX][MTK_LARB_NR_MAX] = {
        [0] = {~0, ~0},                         /* Region0: larb0/1 */
        [1] = {0, 0, 0, 0, ~0, ~0, 0, ~0},      /* Region1: larb4/5/7 */
@@ -1702,6 +1748,9 @@ static const struct of_device_id mtk_iommu_of_ids[] = {
        { .compatible = "mediatek,mt8173-m4u", .data = &mt8173_data},
        { .compatible = "mediatek,mt8183-m4u", .data = &mt8183_data},
        { .compatible = "mediatek,mt8186-iommu-mm",    .data = &mt8186_data_mm}, /* mm: m4u */
+       { .compatible = "mediatek,mt8188-iommu-infra", .data = &mt8188_data_infra},
+       { .compatible = "mediatek,mt8188-iommu-vdo",   .data = &mt8188_data_vdo},
+       { .compatible = "mediatek,mt8188-iommu-vpp",   .data = &mt8188_data_vpp},
        { .compatible = "mediatek,mt8192-m4u", .data = &mt8192_data},
        { .compatible = "mediatek,mt8195-iommu-infra", .data = &mt8195_data_infra},
        { .compatible = "mediatek,mt8195-iommu-vdo",   .data = &mt8195_data_vdo},