dt-bindings: clock: qcom: document the SM8650 GPU Clock Controller

Add bindings documentation for the SM8650 Graphics Clock Controller.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-4-761a6fadb4c0@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml
index 2320be920a5f76d9675de6038971d13eabafd1f4..1a384e8532a59cc99f8e58e3df4b570b16668690 100644 (file)
--- a/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml
@@ -17,12 +17,14 @@ description: |
     include/dt-bindings/clock/qcom,sm8450-gpucc.h
     include/dt-bindings/clock/qcom,sm8550-gpucc.h
     include/dt-bindings/reset/qcom,sm8450-gpucc.h
+    include/dt-bindings/reset/qcom,sm8650-gpucc.h
 
 properties:
   compatible:
     enum:
       - qcom,sm8450-gpucc
       - qcom,sm8550-gpucc
+      - qcom,sm8650-gpucc
 
   clocks:
     items:

diff --git a/include/dt-bindings/clock/qcom,sm8650-gpucc.h b/include/dt-bindings/clock/qcom,sm8650-gpucc.h
new file mode 100644 (file)
index 0000000..d0dc457
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,sm8650-gpucc.h
@@ -0,0 +1,43 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved
+ * Copyright (c) 2023, Linaro Limited
+ */
+
+#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8650_H
+#define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8650_H
+
+/* GPU_CC clocks */
+#define GPU_CC_AHB_CLK                         0
+#define GPU_CC_CRC_AHB_CLK                     1
+#define GPU_CC_CX_ACCU_SHIFT_CLK               2
+#define GPU_CC_CX_FF_CLK                       3
+#define GPU_CC_CX_GMU_CLK                      4
+#define GPU_CC_CXO_AON_CLK                     5
+#define GPU_CC_CXO_CLK                         6
+#define GPU_CC_DEMET_CLK                       7
+#define GPU_CC_DPM_CLK                         8
+#define GPU_CC_FF_CLK_SRC                      9
+#define GPU_CC_FREQ_MEASURE_CLK                        10
+#define GPU_CC_GMU_CLK_SRC                     11
+#define GPU_CC_GX_ACCU_SHIFT_CLK               12
+#define GPU_CC_GX_FF_CLK                       13
+#define GPU_CC_GX_GFX3D_CLK                    14
+#define GPU_CC_GX_GFX3D_RDVM_CLK               15
+#define GPU_CC_GX_GMU_CLK                      16
+#define GPU_CC_GX_VSENSE_CLK                   17
+#define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK         18
+#define GPU_CC_HUB_AON_CLK                     19
+#define GPU_CC_HUB_CLK_SRC                     20
+#define GPU_CC_HUB_CX_INT_CLK                  21
+#define GPU_CC_HUB_DIV_CLK_SRC                 22
+#define GPU_CC_MEMNOC_GFX_CLK                  23
+#define GPU_CC_PLL0                            24
+#define GPU_CC_PLL1                            25
+#define GPU_CC_SLEEP_CLK                       26
+
+/* GDSCs */
+#define GPU_GX_GDSC                            0
+#define GPU_CX_GDSC                            1
+
+#endif

diff --git a/include/dt-bindings/reset/qcom,sm8650-gpucc.h b/include/dt-bindings/reset/qcom,sm8650-gpucc.h
new file mode 100644 (file)
index 0000000..f021a6c
--- /dev/null
+++ b/include/dt-bindings/reset/qcom,sm8650-gpucc.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2023, Linaro Limited
+ */
+
+#ifndef _DT_BINDINGS_RESET_QCOM_GPU_CC_SM8650_H
+#define _DT_BINDINGS_RESET_QCOM_GPU_CC_SM8650_H
+
+#define GPUCC_GPU_CC_ACD_BCR                   0
+#define GPUCC_GPU_CC_CX_BCR                    1
+#define GPUCC_GPU_CC_FAST_HUB_BCR              2
+#define GPUCC_GPU_CC_FF_BCR                    3
+#define GPUCC_GPU_CC_GFX3D_AON_BCR             4
+#define GPUCC_GPU_CC_GMU_BCR                   5
+#define GPUCC_GPU_CC_GX_BCR                    6
+#define GPUCC_GPU_CC_XO_BCR                    7
+#define GPUCC_GPU_CC_GX_ACD_IROOT_BCR          8
+
+#endif