target/loongarch: Use VADDR_PRIx for logging pc_next
authorRichard Henderson <richard.henderson@linaro.org>
Mon, 17 Feb 2025 16:21:36 +0000 (08:21 -0800)
committerRichard Henderson <richard.henderson@linaro.org>
Tue, 18 Feb 2025 16:28:54 +0000 (08:28 -0800)
DisasContextBase.pc_next has type vaddr; use the correct log format.

Fixes: 85c19af63e7 ("include/exec: Use vaddr in DisasContextBase for virtual addresses")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
target/loongarch/tcg/insn_trans/trans_atomic.c.inc
target/loongarch/tcg/translate.c

index 974bc2a70feddbf021a07b19a0859781eb3a11c4..3d70d759417158092795560a3a3d5e80f18517c2 100644 (file)
@@ -56,7 +56,7 @@ static bool gen_am(DisasContext *ctx, arg_rrr *a,
     if (a->rd != 0 && (a->rj == a->rd || a->rk == a->rd)) {
         qemu_log_mask(LOG_GUEST_ERROR,
                       "Warning: source register overlaps destination register"
-                      "in atomic insn at pc=0x" TARGET_FMT_lx "\n",
+                      "in atomic insn at pc=0x%" VADDR_PRIx "\n",
                       ctx->base.pc_next - 4);
         return false;
     }
index 3480f54c71097f1e111178dbf4d45801902cbb2e..e59e4ed25b13f42027c295ccd3ec65f45103cf54 100644 (file)
@@ -289,7 +289,7 @@ static void loongarch_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
 
     if (!decode(ctx, ctx->opcode)) {
         qemu_log_mask(LOG_UNIMP, "Error: unknown opcode. "
-                      TARGET_FMT_lx ": 0x%x\n",
+                      "0x%" VADDR_PRIx ": 0x%x\n",
                       ctx->base.pc_next, ctx->opcode);
         generate_exception(ctx, EXCCODE_INE);
     }