dt-bindings: power: Add MT8365 power domains
authorFabien Parent <fparent@baylibre.com>
Mon, 18 Sep 2023 09:37:45 +0000 (11:37 +0200)
committerUlf Hansson <ulf.hansson@linaro.org>
Tue, 17 Oct 2023 09:38:34 +0000 (11:38 +0200)
Add power domains dt-bindings for MT8365.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
Tested-by: Alexandre Mergnat <amergnat@baylibre.com>
Link: https://lore.kernel.org/r/20230918093751.1188668-2-msp@baylibre.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
include/dt-bindings/power/mediatek,mt8365-power.h [new file with mode: 0644]

index c9acef80f45281b761a4238e8447491fed3bf39b..8985e2df8a566212b5c374ff6cf9db3b69c0fbd7 100644 (file)
@@ -31,6 +31,7 @@ properties:
       - mediatek,mt8188-power-controller
       - mediatek,mt8192-power-controller
       - mediatek,mt8195-power-controller
+      - mediatek,mt8365-power-controller
 
   '#power-domain-cells':
     const: 1
@@ -88,6 +89,7 @@ $defs:
               "include/dt-bindings/power/mediatek,mt8188-power.h" - for MT8188 type power domain.
               "include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain.
               "include/dt-bindings/power/mt8195-power.h" - for MT8195 type power domain.
+              "include/dt-bindings/power/mediatek,mt8365-power.h" - for MT8365 type power domain.
         maxItems: 1
 
       clocks:
@@ -115,6 +117,10 @@ $defs:
         $ref: /schemas/types.yaml#/definitions/phandle
         description: phandle to the device containing the INFRACFG register range.
 
+      mediatek,infracfg-nao:
+        $ref: /schemas/types.yaml#/definitions/phandle
+        description: phandle to the device containing the INFRACFG-NAO register range.
+
       mediatek,smi:
         $ref: /schemas/types.yaml#/definitions/phandle
         description: phandle to the device containing the SMI register range.
diff --git a/include/dt-bindings/power/mediatek,mt8365-power.h b/include/dt-bindings/power/mediatek,mt8365-power.h
new file mode 100644 (file)
index 0000000..e6cfd0e
--- /dev/null
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
+/*
+ * Copyright (c) 2022 MediaTek Inc.
+ */
+
+#ifndef _DT_BINDINGS_POWER_MT8365_POWER_H
+#define _DT_BINDINGS_POWER_MT8365_POWER_H
+
+#define MT8365_POWER_DOMAIN_MM         0
+#define MT8365_POWER_DOMAIN_CONN       1
+#define MT8365_POWER_DOMAIN_MFG                2
+#define MT8365_POWER_DOMAIN_AUDIO      3
+#define MT8365_POWER_DOMAIN_CAM                4
+#define MT8365_POWER_DOMAIN_DSP                5
+#define MT8365_POWER_DOMAIN_VDEC       6
+#define MT8365_POWER_DOMAIN_VENC       7
+#define MT8365_POWER_DOMAIN_APU                8
+
+#endif /* _DT_BINDINGS_POWER_MT8365_POWER_H */