usb: typec: Add Displayport Alternate Mode 2.1 Support
authorUtkarsh Patel <utkarsh.h.patel@intel.com>
Wed, 20 Sep 2023 02:32:39 +0000 (19:32 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 2 Oct 2023 11:58:58 +0000 (13:58 +0200)
Displayport Alternate mode 2.1 requires configuration for additional
cable details such as signalling for cable, UHBR13.5 Support, Cable type
and DPAM version.
These details can be used with mux drivers to configure SOP DP
configuration for Displayport Alternate mode 2.1.
This change also includes pertinent cable signalling support in displayport
alternate mode.

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Utkarsh Patel <utkarsh.h.patel@intel.com>
Link: https://lore.kernel.org/r/20230920023243.2494410-2-utkarsh.h.patel@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/usb/typec/altmodes/displayport.c
drivers/usb/typec/ucsi/displayport.c
drivers/usb/typec/ucsi/ucsi_ccg.c
include/linux/usb/typec_dp.h

index 426c88a516e5112b64d4aa7ebf03bd0757993333..f503cb4cd721b2ebf154e5db3cc6702956f51567 100644 (file)
@@ -86,8 +86,11 @@ static int dp_altmode_notify(struct dp_altmode *dp)
 
 static int dp_altmode_configure(struct dp_altmode *dp, u8 con)
 {
-       u32 conf = DP_CONF_SIGNALING_DP; /* Only DP signaling supported */
        u8 pin_assign = 0;
+       u32 conf;
+
+       /* DP Signalling */
+       conf = (dp->data.conf & DP_CONF_SIGNALLING_MASK) >> DP_CONF_SIGNALLING_SHIFT;
 
        switch (con) {
        case DP_STATUS_CON_DISABLED:
index 73cd5bf350472fcb88756a4faa94c0757edab1fe..d9d3c91125ca888fd1d1f14e61f0858700675762 100644 (file)
@@ -315,7 +315,7 @@ struct typec_altmode *ucsi_register_displayport(struct ucsi_connector *con,
        struct ucsi_dp *dp;
 
        /* We can't rely on the firmware with the capabilities. */
-       desc->vdo |= DP_CAP_DP_SIGNALING | DP_CAP_RECEPTACLE;
+       desc->vdo |= DP_CAP_DP_SIGNALLING(0) | DP_CAP_RECEPTACLE;
 
        /* Claiming that we support all pin assignments */
        desc->vdo |= all_assignments << 8;
index 607061a37eca3de4ce5499e8dae2602fc5c718b2..449c125f6f87008ec636c95491180aef1e81cfcf 100644 (file)
@@ -501,8 +501,8 @@ static void ucsi_ccg_nvidia_altmode(struct ucsi_ccg *uc,
        case NVIDIA_FTB_DP_OFFSET:
                if (alt[0].mid == USB_TYPEC_NVIDIA_VLINK_DBG_VDO)
                        alt[0].mid = USB_TYPEC_NVIDIA_VLINK_DP_VDO |
-                               DP_CAP_DP_SIGNALING | DP_CAP_USB |
-                               DP_CONF_SET_PIN_ASSIGN(BIT(DP_PIN_ASSIGN_E));
+                                    DP_CAP_DP_SIGNALLING(0) | DP_CAP_USB |
+                                    DP_CONF_SET_PIN_ASSIGN(BIT(DP_PIN_ASSIGN_E));
                break;
        case NVIDIA_FTB_DBG_OFFSET:
                if (alt[0].mid == USB_TYPEC_NVIDIA_VLINK_DP_VDO)
index 8d09c2f0a9b80717cdda7eba91cf63959d3be158..1f358098522df71b2a8435b2e69c5f5b8530ee6e 100644 (file)
@@ -67,8 +67,10 @@ enum {
 #define   DP_CAP_UFP_D                 1
 #define   DP_CAP_DFP_D                 2
 #define   DP_CAP_DFP_D_AND_UFP_D       3
-#define DP_CAP_DP_SIGNALING            BIT(2) /* Always set */
-#define DP_CAP_GEN2                    BIT(3) /* Reserved after v1.0b */
+#define DP_CAP_DP_SIGNALLING(_cap_)    (((_cap_) & GENMASK(5, 2)) >> 2)
+#define   DP_CAP_SIGNALLING_HBR3       1
+#define   DP_CAP_SIGNALLING_UHBR10     2
+#define   DP_CAP_SIGNALLING_UHBR20     3
 #define DP_CAP_RECEPTACLE              BIT(6)
 #define DP_CAP_USB                     BIT(7)
 #define DP_CAP_DFP_D_PIN_ASSIGN(_cap_) (((_cap_) & GENMASK(15, 8)) >> 8)
@@ -78,6 +80,13 @@ enum {
                        DP_CAP_UFP_D_PIN_ASSIGN(_cap_) : DP_CAP_DFP_D_PIN_ASSIGN(_cap_))
 #define DP_CAP_PIN_ASSIGN_DFP_D(_cap_) ((_cap_ & DP_CAP_RECEPTACLE) ? \
                        DP_CAP_DFP_D_PIN_ASSIGN(_cap_) : DP_CAP_UFP_D_PIN_ASSIGN(_cap_))
+#define DP_CAP_UHBR_13_5_SUPPORT       BIT(26)
+#define DP_CAP_CABLE_TYPE(_cap_)       (((_cap_) & GENMASK(29, 28)) >> 28)
+#define   DP_CAP_CABLE_TYPE_PASSIVE    0
+#define   DP_CAP_CABLE_TYPE_RE_TIMER   1
+#define   DP_CAP_CABLE_TYPE_RE_DRIVER  2
+#define   DP_CAP_CABLE_TYPE_OPTICAL    3
+#define DP_CAP_DPAM_VERSION            BIT(30)
 
 /* DisplayPort Status Update VDO bits */
 #define DP_STATUS_CONNECTION(_status_) ((_status_) & 3)
@@ -97,13 +106,24 @@ enum {
 #define DP_CONF_CURRENTLY(_conf_)      ((_conf_) & 3)
 #define DP_CONF_UFP_U_AS_DFP_D         BIT(0)
 #define DP_CONF_UFP_U_AS_UFP_D         BIT(1)
-#define DP_CONF_SIGNALING_DP           BIT(2)
-#define DP_CONF_SIGNALING_GEN_2                BIT(3) /* Reserved after v1.0b */
+#define DP_CONF_SIGNALLING_MASK                GENMASK(5, 2)
+#define DP_CONF_SIGNALLING_SHIFT       2
+#define   DP_CONF_SIGNALLING_HBR3      1
+#define   DP_CONF_SIGNALLING_UHBR10    2
+#define   DP_CONF_SIGNALLING_UHBR20    3
 #define DP_CONF_PIN_ASSIGNEMENT_SHIFT  8
 #define DP_CONF_PIN_ASSIGNEMENT_MASK   GENMASK(15, 8)
 
 /* Helper for setting/getting the pin assignment value to the configuration */
 #define DP_CONF_SET_PIN_ASSIGN(_a_)    ((_a_) << 8)
 #define DP_CONF_GET_PIN_ASSIGN(_conf_) (((_conf_) & GENMASK(15, 8)) >> 8)
+#define DP_CONF_UHBR13_5_SUPPORT       BIT(26)
+#define DP_CONF_CABLE_TYPE_MASK                GENMASK(29, 28)
+#define DP_CONF_CABLE_TYPE_SHIFT       28
+#define   DP_CONF_CABLE_TYPE_PASSIVE   0
+#define   DP_CONF_CABLE_TYPE_RE_TIMER  1
+#define   DP_CONF_CABLE_TYPE_RE_DRIVER 2
+#define   DP_CONF_CABLE_TYPE_OPTICAL   3
+#define DP_CONF_DPAM_VERSION           BIT(30)
 
 #endif /* __USB_TYPEC_DP_H */