drm/amd/display: skip CLEAR_PAYLOAD_ID_TABLE if device mst_en is 0

[Why]
Some dock and mst monitor don't like to receive CLEAR_PAYLOAD_ID_TABLE
when mst_en is set to 0. It doesn't make sense to do so in source
side, either.

[How]
Don't send CLEAR_PAYLOAD_ID_TABLE if mst_en is 0

Reviewed-by: George Shen <George.Shen@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Peichen Huang <PeiChen.Huang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
index aa08925d54c98d19ebd3bed018fe1fb147cbec30..f6c5ee2d639b40b5d2df33eaede2b1890ffb56b1 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
@@ -2160,6 +2160,7 @@ static enum dc_status enable_link_dp_mst(
                struct pipe_ctx *pipe_ctx)
 {
        struct dc_link *link = pipe_ctx->stream->link;
+       unsigned char mstm_cntl;
 
        /* sink signal type after MST branch is MST. Multiple MST sinks
         * share one link. Link DP PHY is enable or training only once.
@@ -2168,7 +2169,9 @@ static enum dc_status enable_link_dp_mst(
                return DC_OK;
 
        /* clear payload table */
-       dm_helpers_dp_mst_clear_payload_allocation_table(link->ctx, link);
+       core_link_read_dpcd(link, DP_MSTM_CTRL, &mstm_cntl, 1);
+       if (mstm_cntl & DP_MST_EN)
+               dm_helpers_dp_mst_clear_payload_allocation_table(link->ctx, link);
 
        /* to make sure the pending down rep can be processed
         * before enabling the link