arm64: dts: ti: phycore-am64: Add RTC interrupt pin

Wth commit 16b26f602758 ("rtc: rv3028: Use IRQ flags obtained from device
tree if available") we can now use the interrupt pin of the RTC.
Let's add interrupt pin definitions to the SoM RTC.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20230914093027.3901602-1-w.egorov@phytec.de
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
index 1c2c8f0daca9ffbc9a0d2fb11910465f93a4b04f..f87f09d83c956a9e6c76e0032baa7142c1f19e83 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
@@ -126,6 +126,12 @@
                        AM64X_IOPAD(0x002c, PIN_OUTPUT, 0)      /* (L19) OSPI0_CSn0 */
                >;
        };
+
+       rtc_pins_default: rtc-defaults-pins {
+               pinctrl-single,pins = <
+                       AM64X_IOPAD(0x0278, PIN_INPUT, 7)       /* (C19) EXTINTn.GPIO1_70 */
+               >;
+       };
 };
 
 &cpsw3g {
@@ -177,6 +183,11 @@
        i2c_som_rtc: rtc@52 {
                compatible = "microcrystal,rv3028";
                reg = <0x52>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&rtc_pins_default>;
+               interrupt-parent = <&main_gpio1>;
+               interrupts = <70 IRQ_TYPE_EDGE_FALLING>;
+               wakeup-source;
        };
 };