return irq_create_mapping(sachip->irqdomain, hwirq);
 }
 
-static void sa1111_handle_irqdomain(struct irq_domain *irqdomain, int irq)
-{
-       struct irq_desc *d = irq_to_desc(irq_linear_revmap(irqdomain, irq));
-
-       if (d)
-               generic_handle_irq_desc(d);
-}
-
 /*
  * SA1111 interrupt support.  Since clearing an IRQ while there are
  * active IRQs causes the interrupt output to pulse, the upper levels
 
        for (i = 0; stat0; i++, stat0 >>= 1)
                if (stat0 & 1)
-                       sa1111_handle_irqdomain(irqdomain, i);
+                       generic_handle_domain_irq(irqdomain, i);
 
        for (i = 32; stat1; i++, stat1 >>= 1)
                if (stat1 & 1)
-                       sa1111_handle_irqdomain(irqdomain, i);
+                       generic_handle_domain_irq(irqdomain, i);
 
        /* For level-based interrupts */
        desc->irq_data.chip->irq_unmask(&desc->irq_data);
 
 
        do {
                pending = readl(fpga->base + FPGA_IRQ_SET_CLR) & fpga->irq_mask;
-               for_each_set_bit(bit, &pending, CPLDS_NB_IRQ) {
-                       generic_handle_irq(irq_find_mapping(fpga->irqdomain,
-                                                           bit));
-               }
+               for_each_set_bit(bit, &pending, CPLDS_NB_IRQ)
+                       generic_handle_domain_irq(fpga->irqdomain, bit);
        } while (pending);
 
        return IRQ_HANDLED;
 
        struct s3c_irq_data *irq_data = irq_desc_get_chip_data(desc);
        struct s3c_irq_intc *intc = irq_data->intc;
        struct s3c_irq_intc *sub_intc = irq_data->sub_intc;
-       unsigned int n, offset, irq;
+       unsigned int n, offset;
        unsigned long src, msk;
 
        /* we're using individual domains for the non-dt case
        while (src) {
                n = __ffs(src);
                src &= ~(1 << n);
-               irq = irq_find_mapping(sub_intc->domain, offset + n);
-               generic_handle_irq(irq);
+               generic_handle_domain_irq(sub_intc->domain, offset + n);
        }
 
        chained_irq_exit(chip, desc);