rt2800_register_write(rt2x00dev, TX_TXBF_CFG_0, 0x8000fc21);
                rt2800_register_write(rt2x00dev, TX_TXBF_CFG_3, 0x00009c40);
        } else if (rt2x00_rt(rt2x00dev, RT5390) ||
-                  rt2x00_rt(rt2x00dev, RT5392) ||
-                  rt2x00_rt(rt2x00dev, RT6352)) {
+                  rt2x00_rt(rt2x00dev, RT5392)) {
                rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
                rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
                rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
                rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000401);
                rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x000C0000);
                rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
-               rt2800_register_write(rt2x00dev, MIMO_PS_CFG, 0x00000002);
-               rt2800_register_write(rt2x00dev, TX_PIN_CFG, 0x00150F0F);
                rt2800_register_write(rt2x00dev, TX_ALC_VGA3, 0x00000000);
                rt2800_register_write(rt2x00dev, TX0_BB_GAIN_ATTEN, 0x0);
                rt2800_register_write(rt2x00dev, TX1_BB_GAIN_ATTEN, 0x0);