iio: adc: ti-ads8688: Fix alignment for DMA safety

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 3e87e7838328 ("iio: adc: Add TI ADS8688")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-39-jic23@kernel.org

diff --git a/drivers/iio/adc/ti-ads8688.c b/drivers/iio/adc/ti-ads8688.c
index 708cca0a63be17adcd3850531a2b1dc9a744e2c9..ef06a897421ac4fdac4e042ffde1a4f7a56b7d6f 100644 (file)
--- a/drivers/iio/adc/ti-ads8688.c
+++ b/drivers/iio/adc/ti-ads8688.c
@@ -71,7 +71,7 @@ struct ads8688_state {
        union {
                __be32 d32;
                u8 d8[4];
-       } data[2] ____cacheline_aligned;
+       } data[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 enum ads8688_id {