platform/x86: pmc_atom: Annotate d3_sts register bit defines
authorHans de Goede <hdegoede@redhat.com>
Tue, 5 Mar 2024 10:59:12 +0000 (11:59 +0100)
committerIlpo Järvinen <ilpo.jarvinen@linux.intel.com>
Tue, 12 Mar 2024 10:48:17 +0000 (12:48 +0200)
The include/linux/platform_data/x86/pmc_atom.h d3_sts register bit defines
are named after how these bits are used on Bay Trail devices.

On Cherry Trail (CHT) devices some of these bits have a different meaning
according to the datasheet.

At a comment to the defines for bits which have a different meaning
on Cherry Trail devices.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20240305105915.76242-3-hdegoede@redhat.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
include/linux/platform_data/x86/pmc_atom.h

index 557622ef039041fa722006fb4b06d97b0082813b..161e4bc1c9ee310a55f3ff723d23085da9e6335d 100644 (file)
 #define        BIT_SCC_SDIO            BIT(9)
 #define        BIT_SCC_SDCARD          BIT(10)
 #define        BIT_SCC_MIPI            BIT(11)
-#define        BIT_HDA                 BIT(12)
+#define        BIT_HDA                 BIT(12) /* CHT datasheet: reserved */
 #define        BIT_LPE                 BIT(13)
 #define        BIT_OTG                 BIT(14)
-#define        BIT_USH                 BIT(15)
-#define        BIT_GBE                 BIT(16)
-#define        BIT_SATA                BIT(17)
-#define        BIT_USB_EHCI            BIT(18)
-#define        BIT_SEC                 BIT(19)
+#define        BIT_USH                 BIT(15) /* CHT datasheet: reserved */
+#define        BIT_GBE                 BIT(16) /* CHT datasheet: reserved */
+#define        BIT_SATA                BIT(17) /* CHT datasheet: reserved */
+#define        BIT_USB_EHCI            BIT(18) /* CHT datasheet: XHCI!    */
+#define        BIT_SEC                 BIT(19) /* BYT datasheet: reserved */
 #define        BIT_PCIE_PORT0          BIT(20)
 #define        BIT_PCIE_PORT1          BIT(21)
 #define        BIT_PCIE_PORT2          BIT(22)