PCI: xilinx-nwl: Remove redundant code that sets Type 1 header fields
authorThippeswamy Havalige <thippeswamy.havalige@amd.com>
Mon, 16 Oct 2023 05:10:59 +0000 (10:40 +0530)
committerKrzysztof Wilczyński <kwilczynski@kernel.org>
Thu, 26 Oct 2023 11:54:54 +0000 (11:54 +0000)
The PCI core already updates the primary, secondary and subordinate bus
number registers fields of the Type 1 header.

Thus, remove the redundant code from the nwl_pcie_bridge_init().

[kwilczynski: commit log]
Link: https://lore.kernel.org/linux-pci/20231016051102.1180432-2-thippeswamy.havalige@amd.com
Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
drivers/pci/controller/pcie-xilinx-nwl.c

index 176686bdb15c18e5dc951fdc315d00a1bd2142fc..d8a3a08be1d5662f8a125c58589f5a2802cbab6a 100644 (file)
@@ -166,7 +166,6 @@ struct nwl_pcie {
        int irq_intx;
        int irq_misc;
        u32 ecam_value;
-       u8 last_busno;
        struct nwl_msi msi;
        struct irq_domain *legacy_irq_domain;
        struct clk *clk;
@@ -625,7 +624,7 @@ static int nwl_pcie_bridge_init(struct nwl_pcie *pcie)
 {
        struct device *dev = pcie->dev;
        struct platform_device *pdev = to_platform_device(dev);
-       u32 breg_val, ecam_val, first_busno = 0;
+       u32 breg_val, ecam_val;
        int err;
 
        breg_val = nwl_bridge_readl(pcie, E_BREG_CAPABILITIES) & BREG_PRESENT;
@@ -683,15 +682,6 @@ static int nwl_pcie_bridge_init(struct nwl_pcie *pcie)
        nwl_bridge_writel(pcie, upper_32_bits(pcie->phys_ecam_base),
                          E_ECAM_BASE_HI);
 
-       /* Get bus range */
-       ecam_val = nwl_bridge_readl(pcie, E_ECAM_CONTROL);
-       pcie->last_busno = (ecam_val & E_ECAM_SIZE_LOC) >> E_ECAM_SIZE_SHIFT;
-       /* Write primary, secondary and subordinate bus numbers */
-       ecam_val = first_busno;
-       ecam_val |= (first_busno + 1) << 8;
-       ecam_val |= (pcie->last_busno << E_ECAM_SIZE_SHIFT);
-       writel(ecam_val, (pcie->ecam_base + PCI_PRIMARY_BUS));
-
        if (nwl_pcie_link_up(pcie))
                dev_info(dev, "Link is UP\n");
        else