ARM: tegra: acer-a500: Set WiFi MMC clock rate to 50 MHz

Previously 50MHz clock rate didn't work because of the wrong PINCTRL
configuration used for SDIO pins. Now the PINCTRL config is corrected
and the MMC clock rate could be bumped safely to 50MHz, increasing WiFi
TX throughput by 20 Mbit/s and allowing to hit the maximum 40 Mbit/s.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
index bc7c1d08282853bb482fbaaa3d8f7eccd7e9683f..9489eedcf0c9d14f60fb4895ed8792645bd62ff0 100644 (file)
--- a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
+++ b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
@@ -736,7 +736,7 @@
                #address-cells = <1>;
                #size-cells = <0>;
 
-               max-frequency = <25000000>;
+               max-frequency = <50000000>;
                keep-power-in-suspend;
                bus-width = <4>;
                non-removable;