ASoC: Intel: Skylake: Add support for programming D0i3C

To set the controller in D0i3 mode, the driver needs to set D0i3C
register after DSP is quiesced. Since the D0iX entry/exit is done by IPC,
add this as callback so that it can be invoked from IPC module.

Signed-off-by: Pardha Saradhi K <pardha.saradhi.kesapragada@intel.com>
Signed-off-by: Jayachandran B <jayachandran.b@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/intel/skylake/skl-pcm.c b/sound/soc/intel/skylake/skl-pcm.c
index c966b40da1805772a07a67f08f9286911522d1fa..b69e05ec6844ab289ce3ec376af47eb49c5a6c60 100644 (file)
--- a/sound/soc/intel/skylake/skl-pcm.c
+++ b/sound/soc/intel/skylake/skl-pcm.c
@@ -1211,6 +1211,7 @@ static int skl_platform_soc_probe(struct snd_soc_platform *platform)
                        return ret;
                }
                skl_populate_modules(skl);
+               skl->skl_sst->update_d0i3c = skl_update_d0i3c;
        }
        pm_runtime_mark_last_busy(platform->dev);
        pm_runtime_put_autosuspend(platform->dev);

diff --git a/sound/soc/intel/skylake/skl-sst-ipc.h b/sound/soc/intel/skylake/skl-sst-ipc.h
index 1ae265d8ee084ed17e274d3bbbfb8505b707920c..ef2182d219346d0531db1d0070c1904d0d0e9043 100644 (file)
--- a/sound/soc/intel/skylake/skl-sst-ipc.h
+++ b/sound/soc/intel/skylake/skl-sst-ipc.h
@@ -83,6 +83,9 @@ struct skl_sst {
 
        /* tplg manifest */
        struct skl_dfw_manifest manifest;
+
+       /* Callback to update D0i3C register */
+       void (*update_d0i3c)(struct device *dev, bool enable);
 };
 
 struct skl_ipc_init_instance_msg {

diff --git a/sound/soc/intel/skylake/skl.c b/sound/soc/intel/skylake/skl.c
index 2989c164dafe3a719ed219d2f47ddf73a20ea64d..b9209af89915bc3b95b214a9c7d7df58aae6616e 100644 (file)
--- a/sound/soc/intel/skylake/skl.c
+++ b/sound/soc/intel/skylake/skl.c
@@ -26,6 +26,7 @@
 #include <linux/pm_runtime.h>
 #include <linux/platform_device.h>
 #include <linux/firmware.h>
+#include <linux/delay.h>
 #include <sound/pcm.h>
 #include "../common/sst-acpi.h"
 #include <sound/hda_register.h>
@@ -109,6 +110,52 @@ static int skl_init_chip(struct hdac_bus *bus, bool full_reset)
        return ret;
 }
 
+void skl_update_d0i3c(struct device *dev, bool enable)
+{
+       struct pci_dev *pci = to_pci_dev(dev);
+       struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
+       struct hdac_bus *bus = ebus_to_hbus(ebus);
+       u8 reg;
+       int timeout = 50;
+
+       reg = snd_hdac_chip_readb(bus, VS_D0I3C);
+       /* Do not write to D0I3C until command in progress bit is cleared */
+       while ((reg & AZX_REG_VS_D0I3C_CIP) && --timeout) {
+               udelay(10);
+               reg = snd_hdac_chip_readb(bus, VS_D0I3C);
+       }
+
+       /* Highly unlikely. But if it happens, flag error explicitly */
+       if (!timeout) {
+               dev_err(bus->dev, "Before D0I3C update: D0I3C CIP timeout\n");
+               return;
+       }
+
+       if (enable)
+               reg = reg | AZX_REG_VS_D0I3C_I3;
+       else
+               reg = reg & (~AZX_REG_VS_D0I3C_I3);
+
+       snd_hdac_chip_writeb(bus, VS_D0I3C, reg);
+
+       timeout = 50;
+       /* Wait for cmd in progress to be cleared before exiting the function */
+       reg = snd_hdac_chip_readb(bus, VS_D0I3C);
+       while ((reg & AZX_REG_VS_D0I3C_CIP) && --timeout) {
+               udelay(10);
+               reg = snd_hdac_chip_readb(bus, VS_D0I3C);
+       }
+
+       /* Highly unlikely. But if it happens, flag error explicitly */
+       if (!timeout) {
+               dev_err(bus->dev, "After D0I3C update: D0I3C CIP timeout\n");
+               return;
+       }
+
+       dev_dbg(bus->dev, "D0I3C register = 0x%x\n",
+                       snd_hdac_chip_readb(bus, VS_D0I3C));
+}
+
 /* called from IRQ */
 static void skl_stream_update(struct hdac_bus *bus, struct hdac_stream *hstr)
 {

diff --git a/sound/soc/intel/skylake/skl.h b/sound/soc/intel/skylake/skl.h
index 5d4fbb094c48da9fe238b8c27f09f3c41141d0ed..88ba54ba5f7269ff9c621bdff093a18f7768bdb9 100644 (file)
--- a/sound/soc/intel/skylake/skl.h
+++ b/sound/soc/intel/skylake/skl.h
@@ -52,6 +52,9 @@
 #define AZX_PGCTL_LSRMD_MASK           (1 << 4)
 #define AZX_PCIREG_CGCTL               0x48
 #define AZX_CGCTL_MISCBDCGE_MASK       (1 << 6)
+/* D0I3C Register fields */
+#define AZX_REG_VS_D0I3C_CIP      0x1 /* Command in progress */
+#define AZX_REG_VS_D0I3C_I3       0x4 /* D0i3 enable */
 
 struct skl_dsp_resource {
        u32 max_mcps;
@@ -125,4 +128,6 @@ int skl_suspend_dsp(struct skl *skl);
 int skl_resume_dsp(struct skl *skl);
 void skl_cleanup_resources(struct skl *skl);
 const struct skl_dsp_ops *skl_get_dsp_ops(int pci_id);
+void skl_update_d0i3c(struct device *dev, bool enable);
+
 #endif /* __SOUND_SOC_SKL_H */