scsi: ufs: ufs-exynos: Add EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR option

To skip exynos_ufs_config_phy_*_attr settings for exynos-ufs variant,
provide EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR as an opts flag.

For the ExynosAuto v9 SoC's controller, M-Phy timing setting is not
required and most of vendor-specific configuration will be performed in the
pre_link callback function.

Link: https://lore.kernel.org/r/20211018124216.153072-9-chanho61.park@samsung.com
Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Kiwoong Kim <kwmad.kim@samsung.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

diff --git a/drivers/scsi/ufs/ufs-exynos.c b/drivers/scsi/ufs/ufs-exynos.c
index b9257d72e9c8d5c3c84e9ceba359b9e3972a752a..2c15fde5c8d06b809e2369021f5b29e8d1fb01c8 100644 (file)
--- a/drivers/scsi/ufs/ufs-exynos.c
+++ b/drivers/scsi/ufs/ufs-exynos.c
@@ -830,8 +830,10 @@ static int exynos_ufs_pre_link(struct ufs_hba *hba)
 
        /* m-phy */
        exynos_ufs_phy_init(ufs);
-       exynos_ufs_config_phy_time_attr(ufs);
-       exynos_ufs_config_phy_cap_attr(ufs);
+       if (!(ufs->opts & EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR)) {
+               exynos_ufs_config_phy_time_attr(ufs);
+               exynos_ufs_config_phy_cap_attr(ufs);
+       }
 
        exynos_ufs_setup_clocks(hba, true, PRE_CHANGE);
 

diff --git a/drivers/scsi/ufs/ufs-exynos.h b/drivers/scsi/ufs/ufs-exynos.h
index 74f556d8a00332b00ffdfc4ff0af3b19830f4752..89955ae226dca470f545053427f16aa02f32f3f5 100644 (file)
--- a/drivers/scsi/ufs/ufs-exynos.h
+++ b/drivers/scsi/ufs/ufs-exynos.h
@@ -199,6 +199,7 @@ struct exynos_ufs {
 #define EXYNOS_UFS_OPT_BROKEN_AUTO_CLK_CTRL    BIT(2)
 #define EXYNOS_UFS_OPT_BROKEN_RX_SEL_IDX       BIT(3)
 #define EXYNOS_UFS_OPT_USE_SW_HIBERN8_TIMER    BIT(4)
+#define EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR    BIT(5)
 };
 
 #define for_each_ufs_rx_lane(ufs, i) \