arm64: dts: intel: socfpga_agilex: use defined GIC interrupt type for ECC

Use defined GIC interrupt type instead of hard-coded numbers for ECC
(Error Correction Code) memory, which creates edac sysfs interface.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
index caccb0334adab73248c5cf9b13c32645970513f2..7bbec8aafa628d365c7dc7036d42c57015450255 100644 (file)
--- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
@@ -581,7 +581,7 @@
                        sdramedac {
                                compatible = "altr,sdram-edac-s10";
                                altr,sdr-syscon = <&sdr>;
-                               interrupts = <16 4>;
+                               interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
                        ocram-ecc@ff8cc000 {
@@ -589,7 +589,7 @@
                                             "altr,socfpga-a10-ocram-ecc";
                                reg = <0xff8cc000 0x100>;
                                altr,ecc-parent = <&ocram>;
-                               interrupts = <1 4>;
+                               interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
                        usb0-ecc@ff8c4000 {
@@ -597,7 +597,7 @@
                                             "altr,socfpga-usb-ecc";
                                reg = <0xff8c4000 0x100>;
                                altr,ecc-parent = <&usb0>;
-                               interrupts = <2 4>;
+                               interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
                        emac0-rx-ecc@ff8c0000 {
@@ -605,7 +605,7 @@
                                             "altr,socfpga-eth-mac-ecc";
                                reg = <0xff8c0000 0x100>;
                                altr,ecc-parent = <&gmac0>;
-                               interrupts = <4 4>;
+                               interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
                        emac0-tx-ecc@ff8c0400 {
@@ -613,7 +613,7 @@
                                             "altr,socfpga-eth-mac-ecc";
                                reg = <0xff8c0400 0x100>;
                                altr,ecc-parent = <&gmac0>;
-                               interrupts = <5 4>;
+                               interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
                        sdmmca-ecc@ff8c8c00 {
@@ -621,8 +621,8 @@
                                             "altr,socfpga-sdmmc-ecc";
                                reg = <0xff8c8c00 0x100>;
                                altr,ecc-parent = <&mmc>;
-                               interrupts = <14 4>,
-                                            <15 4>;
+                               interrupts = <14 IRQ_TYPE_LEVEL_HIGH>,
+                                            <15 IRQ_TYPE_LEVEL_HIGH>;
                        };
                };