mtd: spi-nor: core: enable octal DTR mode when possible
authorPratyush Yadav <p.yadav@ti.com>
Mon, 5 Oct 2020 15:31:33 +0000 (21:01 +0530)
committerVignesh Raghavendra <vigneshr@ti.com>
Mon, 9 Nov 2020 06:26:17 +0000 (11:56 +0530)
Allow flashes to specify a hook to enable octal DTR mode. Use this hook
whenever possible to get optimal transfer speeds.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20201005153138.6437-11-p.yadav@ti.com
drivers/mtd/spi-nor/core.c
drivers/mtd/spi-nor/core.h

index 45d45b51705e51b5f32f5d332afafc562cc7a349..7b9ec02734f2da12c13df8826bce2bc92e8f5e4c 100644 (file)
@@ -3067,6 +3067,38 @@ static int spi_nor_init_params(struct spi_nor *nor)
        return 0;
 }
 
+/** spi_nor_octal_dtr_enable() - enable Octal DTR I/O if needed
+ * @nor:                 pointer to a 'struct spi_nor'
+ * @enable:              whether to enable or disable Octal DTR
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int spi_nor_octal_dtr_enable(struct spi_nor *nor, bool enable)
+{
+       int ret;
+
+       if (!nor->params->octal_dtr_enable)
+               return 0;
+
+       if (!(nor->read_proto == SNOR_PROTO_8_8_8_DTR &&
+             nor->write_proto == SNOR_PROTO_8_8_8_DTR))
+               return 0;
+
+       if (!(nor->flags & SNOR_F_IO_MODE_EN_VOLATILE))
+               return 0;
+
+       ret = nor->params->octal_dtr_enable(nor, enable);
+       if (ret)
+               return ret;
+
+       if (enable)
+               nor->reg_proto = SNOR_PROTO_8_8_8_DTR;
+       else
+               nor->reg_proto = SNOR_PROTO_1_1_1;
+
+       return 0;
+}
+
 /**
  * spi_nor_quad_enable() - enable Quad I/O if needed.
  * @nor:                pointer to a 'struct spi_nor'
@@ -3106,6 +3138,12 @@ static int spi_nor_init(struct spi_nor *nor)
 {
        int err;
 
+       err = spi_nor_octal_dtr_enable(nor, true);
+       if (err) {
+               dev_dbg(nor->dev, "octal mode not supported\n");
+               return err;
+       }
+
        err = spi_nor_quad_enable(nor);
        if (err) {
                dev_dbg(nor->dev, "quad mode not supported\n");
index eaece1123c0bc224eff5ba74c16f70204eafb4dc..105a4ddeb3097d68219cbecbad6b3565b5745497 100644 (file)
@@ -204,6 +204,7 @@ struct spi_nor_locking_ops {
  *                      higher index in the array, the higher priority.
  * @erase_map:         the erase map parsed from the SFDP Sector Map Parameter
  *                      Table.
+ * @octal_dtr_enable:  enables SPI NOR octal DTR mode.
  * @quad_enable:       enables SPI NOR quad mode.
  * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode.
  * @convert_addr:      converts an absolute address into something the flash
@@ -227,6 +228,7 @@ struct spi_nor_flash_parameter {
 
        struct spi_nor_erase_map        erase_map;
 
+       int (*octal_dtr_enable)(struct spi_nor *nor, bool enable);
        int (*quad_enable)(struct spi_nor *nor);
        int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable);
        u32 (*convert_addr)(struct spi_nor *nor, u32 addr);