drm/i915/display: No need for full modeset due to psr

There is no specific reason to force full modeset if psr is enabled.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Tested-by: Paz Zcharya <pazz@chromium.org>
Reviewed-by: Stanislav Lisovskiy <staniskav.lisovskiy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240109100517.1947414-2-jouni.hogander@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e161d9544f2af52e8f6acf5566f20d31f9885b76..d4090052772ad076a51a0025270da5290eaae364 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5212,13 +5212,6 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
 
                PIPE_CONF_CHECK_CSC(csc);
                PIPE_CONF_CHECK_CSC(output_csc);
-
-               if (current_config->active_planes) {
-                       PIPE_CONF_CHECK_BOOL(has_psr);
-                       PIPE_CONF_CHECK_BOOL(has_psr2);
-                       PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch);
-                       PIPE_CONF_CHECK_I(dc3co_exitline);
-               }
        }
 
        PIPE_CONF_CHECK_BOOL(double_wide);

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index a0d4ef1a0493885715e96d0d91a98c08c70177ec..3730a4de480fd155ee8244d77dae74828cc6b8f2 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3326,13 +3326,6 @@ bool intel_dp_initial_fastset_check(struct intel_encoder *encoder,
                fastset = false;
        }
 
-       if (CAN_PSR(intel_dp)) {
-               drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] Forcing full modeset to compute PSR state\n",
-                           encoder->base.base.id, encoder->base.name);
-               crtc_state->uapi.mode_changed = true;
-               fastset = false;
-       }
-
        return fastset;
 }