static int smu_set_default_dpm_table(struct smu_context *smu)
 {
+       struct amdgpu_device *adev = smu->adev;
        struct smu_power_context *smu_power = &smu->smu_power;
        struct smu_power_gate *power_gate = &smu_power->power_gate;
        int vcn_gate, jpeg_gate;
        if (!smu->ppt_funcs->set_default_dpm_table)
                return 0;
 
-       vcn_gate = atomic_read(&power_gate->vcn_gated);
-       jpeg_gate = atomic_read(&power_gate->jpeg_gated);
+       if (adev->pg_flags & AMD_PG_SUPPORT_VCN)
+               vcn_gate = atomic_read(&power_gate->vcn_gated);
+       if (adev->pg_flags & AMD_PG_SUPPORT_JPEG)
+               jpeg_gate = atomic_read(&power_gate->jpeg_gated);
 
-       ret = smu_dpm_set_vcn_enable(smu, true);
-       if (ret)
-               return ret;
+       if (adev->pg_flags & AMD_PG_SUPPORT_VCN) {
+               ret = smu_dpm_set_vcn_enable(smu, true);
+               if (ret)
+                       return ret;
+       }
 
-       ret = smu_dpm_set_jpeg_enable(smu, true);
-       if (ret)
-               goto err_out;
+       if (adev->pg_flags & AMD_PG_SUPPORT_JPEG) {
+               ret = smu_dpm_set_jpeg_enable(smu, true);
+               if (ret)
+                       goto err_out;
+       }
 
        ret = smu->ppt_funcs->set_default_dpm_table(smu);
        if (ret)
                dev_err(smu->adev->dev,
                        "Failed to setup default dpm clock tables!\n");
 
-       smu_dpm_set_jpeg_enable(smu, !jpeg_gate);
+       if (adev->pg_flags & AMD_PG_SUPPORT_JPEG)
+               smu_dpm_set_jpeg_enable(smu, !jpeg_gate);
 err_out:
-       smu_dpm_set_vcn_enable(smu, !vcn_gate);
+       if (adev->pg_flags & AMD_PG_SUPPORT_VCN)
+               smu_dpm_set_vcn_enable(smu, !vcn_gate);
+
        return ret;
 }