ALSA: hda/intel: Workaround for WALLCLK register for loongson controller

On loongson controller, the value of WALLCLK register
is always 0, which is meaningless, so we return directly.

Signed-off-by: Yanteng Si <siyanteng@loongson.cn>
Signed-off-by: Yingkun Meng <mengyingkun@loongson.cn>
Acked-by: Huacai Chen <chenhuacai@loongson.cn>
Link: https://lore.kernel.org/r/185df71ef413ab190460eb377703214ee7288aeb.1686128807.git.siyanteng@loongson.cn
Signed-off-by: Takashi Iwai <tiwai@suse.de>

diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index fc4787c7782a2af6b8c8fbf462384d2f3c8c1e63..ef831770ca7daa21fd902f3d7b4bef61c623e25a 100644 (file)
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -655,6 +655,13 @@ static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
        unsigned int pos;
        snd_pcm_uframes_t hwptr, target;
 
+       /*
+        * The value of the WALLCLK register is always 0
+        * on the Loongson controller, so we return directly.
+        */
+       if (chip->driver_type == AZX_DRIVER_LOONGSON)
+               return 1;
+
        wallclk = azx_readl(chip, WALLCLK) - azx_dev->core.start_wallclk;
        if (wallclk < (azx_dev->core.period_wallclk * 2) / 3)
                return -1;      /* bogus (too early) interrupt */