dt-bindings: pinctrl: qcom,sm6375: correct GPIO name pattern and example
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Thu, 2 Feb 2023 10:44:45 +0000 (11:44 +0100)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Fri, 3 Feb 2023 07:14:51 +0000 (08:14 +0100)
The SM6375 TLMM pin controller has GPIOs 0-155, so narrow the pattern
and gpio-ranges in the example.

Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230202104452.299048-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml

index e4231d10d76f50585cdf251d49521b0b11abd594..66cef48ed59b434af2659ba4261f64c0ce820a30 100644 (file)
@@ -63,7 +63,7 @@ $defs:
           subnode.
         items:
           oneOf:
-            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-6])$"
+            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-5])$"
             - enum: [ ufs_reset, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk,
                       sdc2_cmd, sdc2_data ]
         minItems: 1
@@ -134,7 +134,7 @@ examples:
         #gpio-cells = <2>;
         interrupt-controller;
         #interrupt-cells = <2>;
-        gpio-ranges = <&tlmm 0 0 157>;
+        gpio-ranges = <&tlmm 0 0 157>; /* GPIOs + ufs_reset */
 
         gpio-wo-subnode-state {
             pins = "gpio1";