usb: typec: tcpci: Added few missing TCPCI register definitions
authorBadhri Jagan Sridharan <badhri@google.com>
Tue, 16 Mar 2021 22:13:04 +0000 (15:13 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 18 Mar 2021 08:02:18 +0000 (09:02 +0100)
This change adds some of the register bit definitions from the TCPCI spec:
https://www.usb.org/sites/default/files/documents/
usb-port_controller_specification_rev2.0_v1.0_0.pdf

Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Badhri Jagan Sridharan <badhri@google.com>
Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Link: https://lore.kernel.org/r/20210316221304.391206-1-badhri@google.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/usb/typec/tcpm/tcpci.h

index 57b6e24e0a0c11e88d8cab1b5c801ababdb59181..2be7a77d400ef9da9f0c22b8d4076379d190f1a8 100644 (file)
 
 #define TCPC_TCPC_CTRL                 0x19
 #define TCPC_TCPC_CTRL_ORIENTATION     BIT(0)
+#define PLUG_ORNT_CC1                  0
+#define PLUG_ORNT_CC2                  1
 #define TCPC_TCPC_CTRL_BIST_TM         BIT(1)
+#define TCPC_TCPC_CTRL_EN_LK4CONN_ALRT BIT(6)
 
 #define TCPC_EXTENDED_STATUS           0x20
 #define TCPC_EXTENDED_STATUS_VSAFE0V   BIT(0)
 #define TCPC_POWER_CTRL_VCONN_ENABLE   BIT(0)
 #define TCPC_POWER_CTRL_BLEED_DISCHARGE        BIT(3)
 #define TCPC_POWER_CTRL_AUTO_DISCHARGE BIT(4)
+#define TCPC_DIS_VOLT_ALRM             BIT(5)
+#define TCPC_POWER_CTRL_VBUS_VOLT_MON  BIT(6)
 #define TCPC_FAST_ROLE_SWAP_EN         BIT(7)
 
 #define TCPC_CC_STATUS                 0x1d
 #define TCPC_CC_STATUS_TOGGLING                BIT(5)
 #define TCPC_CC_STATUS_TERM            BIT(4)
+#define TCPC_CC_STATUS_TERM_RP         0
+#define TCPC_CC_STATUS_TERM_RD         1
+#define TCPC_CC_STATE_SRC_OPEN         0
 #define TCPC_CC_STATUS_CC2_SHIFT       2
 #define TCPC_CC_STATUS_CC2_MASK                0x3
 #define TCPC_CC_STATUS_CC1_SHIFT       0
 #define TCPC_CC_STATUS_CC1_MASK                0x3
 
 #define TCPC_POWER_STATUS              0x1e
+#define TCPC_POWER_STATUS_DBG_ACC_CON  BIT(7)
 #define TCPC_POWER_STATUS_UNINIT       BIT(6)
 #define TCPC_POWER_STATUS_SOURCING_VBUS        BIT(4)
 #define TCPC_POWER_STATUS_VBUS_DET     BIT(3)
 #define TCPC_POWER_STATUS_VBUS_PRES    BIT(2)
+#define TCPC_POWER_STATUS_SINKING_VBUS BIT(0)
 
 #define TCPC_FAULT_STATUS              0x1f
 
 #define TCPC_RX_DETECT                 0x2f
 #define TCPC_RX_DETECT_HARD_RESET      BIT(5)
 #define TCPC_RX_DETECT_SOP             BIT(0)
+#define TCPC_RX_DETECT_SOP1            BIT(1)
+#define TCPC_RX_DETECT_SOP2            BIT(2)
+#define TCPC_RX_DETECT_DBG1            BIT(3)
+#define TCPC_RX_DETECT_DBG2            BIT(4)
 
 #define TCPC_RX_BYTE_CNT               0x30
 #define TCPC_RX_BUF_FRAME_TYPE         0x31
 #define TCPC_TX_DATA                   0x54 /* through 0x6f */
 
 #define TCPC_VBUS_VOLTAGE                      0x70
+#define TCPC_VBUS_VOLTAGE_MASK                 0x3ff
+#define TCPC_VBUS_VOLTAGE_LSB_MV               25
 #define TCPC_VBUS_SINK_DISCONNECT_THRESH       0x72
 #define TCPC_VBUS_SINK_DISCONNECT_THRESH_LSB_MV        25
 #define TCPC_VBUS_SINK_DISCONNECT_THRESH_MAX   0x3ff