Fix argument order.
authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>
Mon, 2 Jun 2008 08:24:41 +0000 (08:24 +0000)
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>
Mon, 2 Jun 2008 08:24:41 +0000 (08:24 +0000)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4651 c046a42c-6fe2-441c-8c8c-71466251a162

target-mips/translate.c

index e3481e49d54224cad9f4b5fdda778e2d61727049..79af6ca4de62b21a00e7c1ea785db903cca4a094 100644 (file)
@@ -1422,7 +1422,7 @@ static void gen_arith_imm (CPUState *env, DisasContext *ctx, uint32_t opc,
                     tcg_gen_shl_i32(r_tmp2, r_tmp1, r_tmp2);
                     tcg_gen_shri_i32(r_tmp1, r_tmp1, uimm);
                     tcg_gen_or_i32(r_tmp1, r_tmp1, r_tmp2);
-                    tcg_gen_ext_i32_tl(r_tmp1, cpu_T[0]);
+                    tcg_gen_ext_i32_tl(cpu_T[0], r_tmp1);
                     dead_tmp(r_tmp1);
                     dead_tmp(r_tmp2);
                 }
@@ -1762,7 +1762,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
                     tcg_gen_shl_i32(r_tmp3, r_tmp2, r_tmp3);
                     tcg_gen_shr_i32(r_tmp1, r_tmp2, r_tmp1);
                     tcg_gen_or_i32(r_tmp1, r_tmp1, r_tmp3);
-                    tcg_gen_ext_i32_tl(r_tmp1, cpu_T[0]);
+                    tcg_gen_ext_i32_tl(cpu_T[0], r_tmp1);
                     dead_tmp(r_tmp1);
                     dead_tmp(r_tmp2);
                     dead_tmp(r_tmp3);