AT91_PMC_MOSCRCS | AT91_PMC_CFDEV,
 };
 
+static const struct at91_pmc_caps sama5d2_caps = {
+       .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_MCKRDY |
+                         AT91_PMC_LOCKU | AT91_PMC_PCK0RDY |
+                         AT91_PMC_PCK1RDY | AT91_PMC_PCK2RDY |
+                         AT91_PMC_MOSCSELS | AT91_PMC_MOSCRCS |
+                         AT91_PMC_CFDEV | AT91_PMC_GCKRDY,
+};
+
 static const struct at91_pmc_caps sama5d3_caps = {
        .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_MCKRDY |
                          AT91_PMC_LOCKU | AT91_PMC_PCK0RDY |
 CLK_OF_DECLARE(at91sam9x5_clk_pmc, "atmel,at91sam9x5-pmc",
               of_at91sam9x5_pmc_setup);
 
+static void __init of_sama5d2_pmc_setup(struct device_node *np)
+{
+       of_at91_pmc_setup(np, &sama5d2_caps);
+}
+CLK_OF_DECLARE(sama5d2_clk_pmc, "atmel,sama5d2-pmc",
+              of_sama5d2_pmc_setup);
+
 static void __init of_sama5d3_pmc_setup(struct device_node *np)
 {
        of_at91_pmc_setup(np, &sama5d3_caps);
 
 #define AT91_PMC_MOSCSELS      16              /* Main Oscillator Selection */
 #define AT91_PMC_MOSCRCS       17              /* Main On-Chip RC */
 #define AT91_PMC_CFDEV         18              /* Clock Failure Detector Event */
+#define AT91_PMC_GCKRDY                24              /* Generated Clocks */
 
 #endif
 
 #define                AT91_PMC_MOSCSELS       (1 << 16)               /* Main Oscillator Selection [some SAM9] */
 #define                AT91_PMC_MOSCRCS        (1 << 17)               /* Main On-Chip RC [some SAM9] */
 #define                AT91_PMC_CFDEV          (1 << 18)               /* Clock Failure Detector Event [some SAM9] */
+#define                AT91_PMC_GCKRDY         (1 << 24)               /* Generated Clocks */
 #define        AT91_PMC_IMR            0x6c                    /* Interrupt Mask Register */
 
 #define AT91_PMC_PLLICPR       0x80                    /* PLL Charge Pump Current Register */