dt-bindings: mmc: sdhci-msm: allow flexible order of optional clocks

The Qualcomm SDHCI controller lists optional clocks, but still expects
fixed order of them and does not allow to skip such clocks if further
one in the list is needed.  These optional clocks are truly optional,
so we need to allow the list to have different orders.  The clocks are:
 - ice: used for Inline Crypto Engine, which is actually separate block
   and merging it with SDHCI is not a requirement,
 - bus: clock for SDCC bus frequency voting,
 - cal and sleep: used for RCLK delay calibration and required for
   certain platforms for such calibration (as expressed in original
   commit 4946b3af5e8e ("mmc: sdhci-msm: Enable delay circuit
   calibration clocks")).  Only MSM8974pro has these clocks.

Relaxing the order fixes dtbs_check warnings:

  qcom-msm8974pro-fairphone-fp2.dtb: mmc@f9824900: clock-names:3: 'ice' was expected
  qcom-msm8974pro-fairphone-fp2.dtb: mmc@f9824900: clock-names:4: 'bus' was expected

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230825135503.282135-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
index 80141eb7fc6bed58e820303561512f8104d25984..fa9afe0db5c39d3b606539e15bcf26e547f4e882 100644 (file)
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
@@ -85,10 +85,10 @@ properties:
       - const: iface
       - const: core
       - const: xo
-      - const: ice
-      - const: bus
-      - const: cal
-      - const: sleep
+      - enum: [ice, bus, cal, sleep]
+      - enum: [ice, bus, cal, sleep]
+      - enum: [ice, bus, cal, sleep]
+      - enum: [ice, bus, cal, sleep]
 
   dma-coherent: true