No point in having a wrapper around read_apic_id().
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Tested-by: Michael Kelley <mikelley@microsoft.com>
Tested-by: Sohil Mehta <sohil.mehta@intel.com>
Tested-by: Juergen Gross <jgross@suse.com> # Xen PV (dom0 and unpriv. guest)
 extern int default_cpu_present_to_apicid(int mps_cpu);
 extern int default_check_phys_apicid_present(int phys_apicid);
 
-#endif /* CONFIG_X86_LOCAL_APIC */
+#else /* CONFIG_X86_LOCAL_APIC */
+
+static inline unsigned int read_apic_id(void) { return 0; }
+
+#endif /* !CONFIG_X86_LOCAL_APIC */
 
 #ifdef CONFIG_SMP
 void apic_smt_update(void);
 
 
 extern unsigned disabled_cpus;
 
-#ifdef CONFIG_X86_LOCAL_APIC
-extern int hard_smp_processor_id(void);
-
-#else /* CONFIG_X86_LOCAL_APIC */
-#define hard_smp_processor_id()        0
-#endif /* CONFIG_X86_LOCAL_APIC */
-
 #ifdef CONFIG_DEBUG_NMI_SELFTEST
 extern void nmi_selftest(void);
 #else
 
        return cpu;
 }
 
-int hard_smp_processor_id(void)
-{
-       return read_apic_id();
-}
-
 void __irq_msi_compose_msg(struct irq_cfg *cfg, struct msi_msg *msg,
                           bool dmar)
 {
 
        entry0 = ioapic_read_entry(apic, pin);
        clear_IO_APIC_pin(apic, pin);
 
-       apic_id = hard_smp_processor_id();
+       apic_id = read_apic_id();
        memset(&entry1, 0, sizeof(entry1));
 
        entry1.dest_mode_logical        = true;
 
        if (!boot_cpu_has(X86_FEATURE_APIC))
                return 0;
 
-       apicid = hard_smp_processor_id();
+       apicid = read_apic_id();
        if (apicid == BAD_APICID)
                return 0;
 
 
        u64 icr;
 
        pr_debug("printing local APIC contents on CPU#%d/%d:\n",
-                smp_processor_id(), hard_smp_processor_id());
+                smp_processor_id(), read_apic_id());
        v = apic_read(APIC_ID);
        pr_info("... APIC ID:      %08x (%01x)\n", v, read_apic_id());
        v = apic_read(APIC_LVR);
 
                set_cpu_cap(c, X86_FEATURE_FSRS);
 
        /* get apicid instead of initial apic id from cpuid */
-       c->apicid = hard_smp_processor_id();
+       c->apicid = read_apic_id();
 
        /* K6s reports MCEs but don't actually have all the MSRs */
        if (c->x86 < 6)
 
  */
 #include <linux/io.h>
 
+#include <asm/apic.h>
 #include <asm/cpu.h>
 #include <asm/smp.h>
 #include <asm/numa.h>
        set_cpu_cap(c, X86_FEATURE_REP_GOOD);
 
        /* get apicid instead of initial apic id from cpuid */
-       c->apicid = hard_smp_processor_id();
+       c->apicid = read_apic_id();
 
        /*
         * XXX someone from Hygon needs to confirm this DTRT
 
        }
 #endif
 
-       if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
+       if (!physid_isset(read_apic_id(), phys_cpu_present_map)) {
                pr_warn("weird, boot CPU (#%d) not listed by the BIOS\n",
-                       hard_smp_processor_id());
+                       read_apic_id());
 
-               physid_set(hard_smp_processor_id(), phys_cpu_present_map);
+               physid_set(read_apic_id(), phys_cpu_present_map);
        }
 
        /*
        if (!apic->check_phys_apicid_present(boot_cpu_physical_apicid)) {
                pr_notice("weird, boot CPU (#%d) not listed by the BIOS\n",
                          boot_cpu_physical_apicid);
-               physid_set(hard_smp_processor_id(), phys_cpu_present_map);
+               physid_set(read_apic_id(), phys_cpu_present_map);
        }
        preempt_enable();
 }
        if (!num_processors) {
                if (boot_cpu_has(X86_FEATURE_APIC)) {
                        int apicid = boot_cpu_physical_apicid;
-                       int cpu = hard_smp_processor_id();
+                       int cpu = read_apic_id();
 
                        pr_warn("Boot CPU (id %d) not listed by BIOS\n", cpu);
 
 
 
 static int apicid_phys_pkg_id(int initial_apic_id, int index_msb)
 {
-       return hard_smp_processor_id() >> index_msb;
+       return read_apic_id() >> index_msb;
 }
 
 static void vsmp_apic_post_init(void)