drm/xe: Support device page faults on integrated platforms
authorBrian Welty <brian.welty@intel.com>
Mon, 20 Nov 2023 18:44:51 +0000 (10:44 -0800)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Thu, 21 Dec 2023 16:45:10 +0000 (11:45 -0500)
Update xe_migrate_prepare_vm() to use the usm batch buffer even for
servicing device page faults on integrated platforms. And as we have
no VRAM on integrated platforms, device pagefault handler should not
attempt to migrate into VRAM.
LNL is first integrated platform to support device pagefaults.

Signed-off-by: Brian Welty <brian.welty@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/xe/xe_gt_pagefault.c
drivers/gpu/drm/xe/xe_migrate.c

index 0a278df6a97f256dd92c8a05abcc63622d3f8040..ccf5a6671faf84299d001417a946abd327ab3a8e 100644 (file)
@@ -106,7 +106,7 @@ static int xe_pf_begin(struct drm_exec *exec, struct xe_vma *vma,
        if (err)
                return err;
 
-       if (atomic) {
+       if (atomic && IS_DGFX(vm->xe)) {
                if (xe_vma_is_userptr(vma)) {
                        err = -EACCES;
                        return err;
index 4aea748c984b4f0952a84c70469a3e40537b7789..84e138df017228fa1ebe6cf30547d282fb7f5cbd 100644 (file)
@@ -215,10 +215,13 @@ static int xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m,
        }
 
        if (!IS_DGFX(xe)) {
-               xe_tile_assert(tile, !xe->info.supports_usm);
-
                /* Write out batch too */
                m->batch_base_ofs = NUM_PT_SLOTS * XE_PAGE_SIZE;
+               if (xe->info.supports_usm) {
+                       batch = tile->primary_gt->usm.bb_pool->bo;
+                       m->usm_batch_base_ofs = m->batch_base_ofs;
+               }
+
                for (i = 0; i < batch->size;
                     i += vm->flags & XE_VM_FLAG_64K ? XE_64K_PAGE_SIZE :
                     XE_PAGE_SIZE) {