dt-bindings: mailbox: imx-mu: add i.MX8ULP S400 MU support
authorPeng Fan <peng.fan@nxp.com>
Fri, 22 Oct 2021 10:18:55 +0000 (18:18 +0800)
committerJassi Brar <jaswinder.singh@linaro.org>
Sat, 30 Oct 2021 03:57:10 +0000 (22:57 -0500)
Similar to i.MX8QM/QXP SCU, i.MX8ULP SCU MU is dedicated for
communication between S400 and Cortex-A cores from hardware design,
it could not be reused for other purpose. To use S400 MU more
effectivly, add "fsl,imx8ulp-mu-s4" compatile to support fast IPC.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Documentation/devicetree/bindings/mailbox/fsl,mu.yaml

index 675ad9de15bb7ac761e5ab02d686bab70da8bd3d..a337bcd80c4a57e2be80b2c0a6c74c1dcecca0eb 100644 (file)
@@ -28,6 +28,7 @@ properties:
       - const: fsl,imx7ulp-mu
       - const: fsl,imx8ulp-mu
       - const: fsl,imx8-mu-scu
+      - const: fsl,imx8ulp-mu-s4
       - items:
           - enum:
               - fsl,imx7s-mu