blockCount_p1 = buffSize / blockSize_p1;
        remainSize_p1 = buffSize % blockSize_p1;
 
-       if (blockCount_p1) {
-       }
-
        for (i = 0; i < blockCount_p1; i++) {
                ret = rtw_write32(padapter, (FW_8723B_START_ADDRESS + i * blockSize_p1), *((u32 *)(bufferPtr + i * blockSize_p1)));
                if (ret == _FAIL) {
 
                blockCount_p2 = remainSize_p1/blockSize_p2;
                remainSize_p2 = remainSize_p1%blockSize_p2;
-
-               if (blockCount_p2) {
-               }
-
        }
 
        /* 3 Phase #3 */
                        *pGroup = 3;
                else if (12 <= Channel && Channel <= 14)
                        *pGroup = 4;
-               else {
-               }
        } else {
                bIn24G = false;
 
                        *pGroup = 12;
                else if (173  <= Channel && Channel <= 177)
                        *pGroup = 13;
-               else {
-               }
-
        }
        return bIn24G;
 }
                        ptxdesc->spe_rpt = 1;
                        ptxdesc->sw_define = (u8)(GET_PRIMARY_ADAPTER(padapter)->xmitpriv.seq_no);
                }
-       } else if (pxmitframe->frame_tag == TXAGG_FRAMETAG) {
        } else {
                ptxdesc->macid = pattrib->mac_id; /*  CAM_ID(MAC_ID) */
                ptxdesc->rate_id = pattrib->raid; /*  Rate ID */
        struct xmit_priv *xmitpriv = &padapter->xmitpriv;
 
        xmitpriv->SdioXmitThread = kthread_run(rtl8723bs_xmit_thread, padapter, "RTWHALXT");
-       if (IS_ERR(xmitpriv->SdioXmitThread)) {
-       }
 }
 
 void rtl8723b_stop_thread(struct adapter *padapter)
 
                        DBG_871X("Invalid Rate!!\n");
                        break;
                }
-       } else {
        }
 }
 
                        SCSettingOf40 = VHT_DATA_SC_40_LOWER_OF_80MHZ;
                else if (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
                        SCSettingOf40 = VHT_DATA_SC_40_UPPER_OF_80MHZ;
-               else
-                       {}
 
                if (
                        (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) &&
                        (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
                )
                        SCSettingOf20 = VHT_DATA_SC_20_UPPERST_OF_80MHZ;
-               else
-                       {}
        } else if (pHalData->CurrentChannelBW == CHANNEL_WIDTH_40) {
                if (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
                        SCSettingOf20 = VHT_DATA_SC_20_UPPER_OF_80MHZ;
                else if (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
                        SCSettingOf20 = VHT_DATA_SC_20_LOWER_OF_80MHZ;
-               else
-                       {}
        }
 
        return  (SCSettingOf40 << 4) | SCSettingOf20;
 
                                        if (pattrib->physt)
                                                update_recvframe_phyinfo(precvframe, (struct phy_stat *)ptr);
 
-                                       if (rtw_recv_entry(precvframe) != _SUCCESS) {
-                                       }
+                                       rtw_recv_entry(precvframe);
                                } else if (pattrib->pkt_rpt_type == C2H_PACKET) {
                                        struct c2h_evt_hdr_t    C2hEvent;