#define PCI_HOTPLUG_ADDR 0xae00
#define PCI_HOTPLUG_SIZE 0x0014
-#define PCI_UP_BASE 0xae00
-#define PCI_DOWN_BASE 0xae04
-#define PCI_EJ_BASE 0xae08
-#define PCI_RMV_BASE 0xae0c
-#define PCI_SEL_BASE 0xae10
+#define PCI_UP_BASE 0x0000
+#define PCI_DOWN_BASE 0x0004
+#define PCI_EJ_BASE 0x0008
+#define PCI_RMV_BASE 0x000c
+#define PCI_SEL_BASE 0x0010
typedef struct AcpiPciHpFind {
int bsel;
}
switch (addr) {
- case PCI_UP_BASE - PCI_HOTPLUG_ADDR:
+ case PCI_UP_BASE:
val = s->acpi_pcihp_pci_status[bsel].up;
s->acpi_pcihp_pci_status[bsel].up = 0;
ACPI_PCIHP_DPRINTF("pci_up_read %" PRIu32 "\n", val);
break;
- case PCI_DOWN_BASE - PCI_HOTPLUG_ADDR:
+ case PCI_DOWN_BASE:
val = s->acpi_pcihp_pci_status[bsel].down;
ACPI_PCIHP_DPRINTF("pci_down_read %" PRIu32 "\n", val);
break;
- case PCI_EJ_BASE - PCI_HOTPLUG_ADDR:
+ case PCI_EJ_BASE:
/* No feature defined yet */
ACPI_PCIHP_DPRINTF("pci_features_read %" PRIu32 "\n", val);
break;
- case PCI_RMV_BASE - PCI_HOTPLUG_ADDR:
+ case PCI_RMV_BASE:
val = s->acpi_pcihp_pci_status[bsel].hotplug_enable;
ACPI_PCIHP_DPRINTF("pci_rmv_read %" PRIu32 "\n", val);
break;
- case PCI_SEL_BASE - PCI_HOTPLUG_ADDR:
+ case PCI_SEL_BASE:
val = s->hotplug_select;
ACPI_PCIHP_DPRINTF("pci_sel_read %" PRIu32 "\n", val);
default:
{
AcpiPciHpState *s = opaque;
switch (addr) {
- case PCI_EJ_BASE - PCI_HOTPLUG_ADDR:
+ case PCI_EJ_BASE:
if (s->hotplug_select >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
break;
}
ACPI_PCIHP_DPRINTF("pciej write %" HWADDR_PRIx " <== %" PRIu64 "\n",
addr, data);
break;
- case PCI_SEL_BASE - PCI_HOTPLUG_ADDR:
+ case PCI_SEL_BASE:
s->hotplug_select = data;
ACPI_PCIHP_DPRINTF("pcisel write %" HWADDR_PRIx " <== %" PRIu64 "\n",
addr, data);