selftests/powerpc/pmu/: Add interface test for mmcr0_cc56run field

The testcase uses event code 0x500fa ("instructions") to check the
CC56RUN bit setting in Monitor Mode Control Register 0(MMCR0). In ISA
v3.1 platform, this bit is expected to be set in MMCR0 when using
Performance Monitor Counter 5 and 6 (PMC5 and PMC6). Verify this is done
correctly by perf interface.

CC56RUN bit makes PMC5 and PMC6 count regardless of the run latch state.
This bit is set in power10 since PMC5 and PMC6 is used in power10 for
counting instructions and cycles. Hence added a check to skip this test
in other platforms

Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
[mpe: Add error checking, drop GET_MMCR_FIELD, add to .gitignore]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220127072012.662451-11-kjain@linux.ibm.com

diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/.gitignore b/tools/testing/selftests/powerpc/pmu/sampling_tests/.gitignore
index 067b9f3a7f842d9e01d02a027250ce2c7b44a22f..641634e3bace1890ff242462793a7962b8fc922c 100644 (file)
--- a/tools/testing/selftests/powerpc/pmu/sampling_tests/.gitignore
+++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/.gitignore
@@ -1 +1,2 @@
 mmcr0_exceptionbits_test
+mmcr0_cc56run_test

diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile b/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile
index c81db8b553f6bb18d6b9984e81fc29ae55c99083..fc0b39957522b19fb4368ac7f291a394fa16c450 100644 (file)
--- a/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0
 CFLAGS += -m64
 
-TEST_GEN_PROGS := mmcr0_exceptionbits_test
+TEST_GEN_PROGS := mmcr0_exceptionbits_test mmcr0_cc56run_test
 
 top_srcdir = ../../../../../..
 include ../../../lib.mk

diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcr0_cc56run_test.c b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcr0_cc56run_test.c
new file mode 100644 (file)
index 0000000..ae4172f
--- /dev/null
+++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcr0_cc56run_test.c
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Athira Rajeev, IBM Corp.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+
+#include "../event.h"
+#include "misc.h"
+#include "utils.h"
+
+extern void thirty_two_instruction_loop(int loops);
+
+/*
+ * A perf sampling test for mmcr0
+ * field: cc56run.
+ */
+static int mmcr0_cc56run(void)
+{
+       struct event event;
+       u64 *intr_regs;
+
+       /* Check for platform support for the test */
+       SKIP_IF(check_pvr_for_sampling_tests());
+       SKIP_IF(!have_hwcap2(PPC_FEATURE2_ARCH_3_1));
+
+        /* Init the event for the sampling test */
+       event_init_sampling(&event, 0x500fa);
+       event.attr.sample_regs_intr = platform_extended_mask;
+       FAIL_IF(event_open(&event));
+       event.mmap_buffer = event_sample_buf_mmap(event.fd, 1);
+
+       FAIL_IF(event_enable(&event));
+
+       /* workload to make the event overflow */
+       thirty_two_instruction_loop(10000);
+
+       FAIL_IF(event_disable(&event));
+
+       /* Check for sample count */
+       FAIL_IF(!collect_samples(event.mmap_buffer));
+
+       intr_regs = get_intr_regs(&event, event.mmap_buffer);
+
+       /* Check for intr_regs */
+       FAIL_IF(!intr_regs);
+
+       /* Verify that cc56run bit is set in MMCR0 */
+       FAIL_IF(!get_mmcr0_cc56run(get_reg_value(intr_regs, "MMCR0"), 5));
+
+       event_close(&event);
+       return 0;
+}
+
+int main(void)
+{
+       return test_harness(mmcr0_cc56run, "mmcr0_cc56run");
+}