/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
 /*
- * Copyright (C) 2005-2014, 2018-2021 Intel Corporation
+ * Copyright (C) 2005-2014, 2018-2022 Intel Corporation
  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
  * Copyright (C) 2016 Intel Deutschland GmbH
  */
 #define UREG_LMAC1_CURRENT_PC          0xa05c1c
 #define UREG_LMAC2_CURRENT_PC          0xa05c20
 
+#define WFPM_LMAC1_PD_NOTIFICATION      0xa0338c
+#define WFPM_ARC1_PD_NOTIFICATION       0xa03044
+
 /* For UMAG_GEN_HW_STATUS reg check */
 enum {
        UMAG_GEN_HW_IS_FPGA = BIT(1),
 
 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
 /*
- * Copyright (C) 2012-2014, 2018-2021 Intel Corporation
+ * Copyright (C) 2012-2014, 2018-2022 Intel Corporation
  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
  * Copyright (C) 2016-2017 Intel Deutschland GmbH
  */
        return false;
 }
 
+static void iwl_mvm_print_pd_notification(struct iwl_mvm *mvm)
+{
+       struct iwl_trans *trans = mvm->trans;
+       enum iwl_device_family device_family = trans->trans_cfg->device_family;
+
+       if (device_family < IWL_DEVICE_FAMILY_8000)
+               return;
+
+       if (device_family <= IWL_DEVICE_FAMILY_9000)
+               IWL_ERR(mvm, "WFPM_ARC1_PD_NOTIFICATION: 0x%x\n",
+                       iwl_read_umac_prph(trans, WFPM_ARC1_PD_NOTIFICATION));
+       else
+               IWL_ERR(mvm, "WFPM_LMAC1_PD_NOTIFICATION: 0x%x\n",
+                       iwl_read_umac_prph(trans, WFPM_LMAC1_PD_NOTIFICATION));
+}
+
 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
                                         enum iwl_ucode_type ucode_type)
 {
                                iwl_read_prph(trans, SB_CPU_2_STATUS));
                }
 
+               iwl_mvm_print_pd_notification(mvm);
+
                /* LMAC/UMAC PC info */
                if (trans->trans_cfg->device_family >=
                                        IWL_DEVICE_FAMILY_9000) {