arm64: dts: qcom: sm6115: Fix UFS PHY clocks

QMP PHY used in SM6115 requires 3 clocks:

* ref - 19.2MHz reference clock from RPM
* ref_aux - Auxiliary reference clock from GCC
* qref - QREF clock from GCC

Fixes: 97e563bf5ba1 ("arm64: dts: qcom: sm6115: Add basic soc dtsi")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-8-58a49d2f4605@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index fc4fbda2be5c1d38ddc0a0ef34dff022df63db2d..fb067d6c69f6b5f48857533ad14194ce112412f7 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -1202,8 +1202,12 @@
                        compatible = "qcom,sm6115-qmp-ufs-phy";
                        reg = <0x0 0x04807000 0x0 0x1000>;
 
-                       clocks = <&gcc GCC_UFS_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
-                       clock-names = "ref", "ref_aux";
+                       clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
+                                <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
+                                <&gcc GCC_UFS_CLKREF_CLK>;
+                       clock-names = "ref",
+                                     "ref_aux",
+                                     "qref";
 
                        resets = <&ufs_mem_hc 0>;
                        reset-names = "ufsphy";