arm64: dts: imx93: Add phyBOARD-Segin-i.MX93 support

Add basic support for phyBOARD-Segin-i.MX93.
Main features are:
* eMMC
* Ethernet
* SD-Card
* UART

Tested-by: Primoz Fiser <primoz.fiser@norik.com>
Signed-off-by: Mathieu Othacehe <othacehe@gnu.org>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 2e73a2e75c06baf2885bf0febe910978fc102010..2e347a594fdd6a540ef604c5fc5d77ae86a58421 100644 (file)
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -203,6 +203,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8qxp-tqma8xqp-mba8xx.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx93-11x11-evk.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx93-phyboard-segin.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxca.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx93-var-som-symphony.dtb

diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
new file mode 100644 (file)
index 0000000..85fb188
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
@@ -0,0 +1,117 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023 PHYTEC Messtechnik GmbH
+ * Author: Wadim Egorov <w.egorov@phytec.de>, Christoph Stoidner <c.stoidner@phytec.de>
+ * Copyright (C) 2024 Mathieu Othacehe <m.othacehe@gmail.com>
+ *
+ * Product homepage:
+ * phyBOARD-Segin carrier board is reused for the i.MX93 design.
+ * https://www.phytec.eu/en/produkte/single-board-computer/phyboard-segin-imx6ul/
+ */
+/dts-v1/;
+
+#include "imx93-phycore-som.dtsi"
+
+/{
+       model = "PHYTEC phyBOARD-Segin-i.MX93";
+       compatible = "phytec,imx93-phyboard-segin", "phytec,imx93-phycore-som",
+                    "fsl,imx93";
+
+       chosen {
+               stdout-path = &lpuart1;
+       };
+
+       reg_usdhc2_vmmc: regulator-usdhc2 {
+               compatible = "regulator-fixed";
+               enable-active-high;
+               gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-name = "VCC_SD";
+       };
+};
+
+/* Console */
+&lpuart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart1>;
+       status = "okay";
+};
+
+/* eMMC */
+&usdhc1 {
+       no-1-8-v;
+};
+
+/* SD-Card */
+&usdhc2 {
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
+       pinctrl-0 = <&pinctrl_usdhc2_default>, <&pinctrl_usdhc2_cd>;
+       pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_cd>;
+       pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_cd>;
+       bus-width = <4>;
+       cd-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+       no-mmc;
+       no-sdio;
+       vmmc-supply = <&reg_usdhc2_vmmc>;
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl_uart1: uart1grp {
+               fsl,pins = <
+                       MX93_PAD_UART1_RXD__LPUART1_RX          0x31e
+                       MX93_PAD_UART1_TXD__LPUART1_TX          0x30e
+               >;
+       };
+
+       pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
+               fsl,pins = <
+                       MX93_PAD_SD2_RESET_B__GPIO3_IO07        0x31e
+               >;
+       };
+
+       pinctrl_usdhc2_cd: usdhc2cdgrp {
+               fsl,pins = <
+                       MX93_PAD_SD2_CD_B__GPIO3_IO00           0x31e
+               >;
+       };
+
+       pinctrl_usdhc2_default: usdhc2grp {
+               fsl,pins = <
+                       MX93_PAD_SD2_CLK__USDHC2_CLK            0x179e
+                       MX93_PAD_SD2_CMD__USDHC2_CMD            0x139e
+                       MX93_PAD_SD2_DATA0__USDHC2_DATA0        0x138e
+                       MX93_PAD_SD2_DATA1__USDHC2_DATA1        0x138e
+                       MX93_PAD_SD2_DATA2__USDHC2_DATA2        0x138e
+                       MX93_PAD_SD2_DATA3__USDHC2_DATA3        0x139e
+                       MX93_PAD_SD2_VSELECT__USDHC2_VSELECT    0x51e
+               >;
+       };
+
+       pinctrl_usdhc2_100mhz: usdhc2grp {
+               fsl,pins = <
+                       MX93_PAD_SD2_CLK__USDHC2_CLK            0x179e
+                       MX93_PAD_SD2_CMD__USDHC2_CMD            0x139e
+                       MX93_PAD_SD2_DATA0__USDHC2_DATA0        0x138e
+                       MX93_PAD_SD2_DATA1__USDHC2_DATA1        0x138e
+                       MX93_PAD_SD2_DATA2__USDHC2_DATA2        0x139e
+                       MX93_PAD_SD2_DATA3__USDHC2_DATA3        0x139e
+                       MX93_PAD_SD2_VSELECT__USDHC2_VSELECT    0x51e
+               >;
+       };
+
+       pinctrl_usdhc2_200mhz: usdhc2grp {
+               fsl,pins = <
+                       MX93_PAD_SD2_CLK__USDHC2_CLK            0x178e
+                       MX93_PAD_SD2_CMD__USDHC2_CMD            0x139e
+                       MX93_PAD_SD2_DATA0__USDHC2_DATA0        0x139e
+                       MX93_PAD_SD2_DATA1__USDHC2_DATA1        0x139e
+                       MX93_PAD_SD2_DATA2__USDHC2_DATA2        0x139e
+                       MX93_PAD_SD2_DATA3__USDHC2_DATA3        0x139e
+                       MX93_PAD_SD2_VSELECT__USDHC2_VSELECT    0x51e
+               >;
+       };
+};

diff --git a/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
new file mode 100644 (file)
index 0000000..88c2657
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
@@ -0,0 +1,126 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023 PHYTEC Messtechnik GmbH
+ * Author: Wadim Egorov <w.egorov@phytec.de>, Christoph Stoidner <c.stoidner@phytec.de>
+ * Copyright (C) 2024 Mathieu Othacehe <m.othacehe@gmail.com>
+ *
+ * Product homepage:
+ * https://www.phytec.eu/en/produkte/system-on-modules/phycore-imx-91-93/
+ */
+
+#include <dt-bindings/leds/common.h>
+
+#include "imx93.dtsi"
+
+/{
+       model = "PHYTEC phyCORE-i.MX93";
+       compatible = "phytec,imx93-phycore-som", "fsl,imx93";
+
+       reserved-memory {
+               ranges;
+               #address-cells = <2>;
+               #size-cells = <2>;
+
+               linux,cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       alloc-ranges = <0 0x80000000 0 0x40000000>;
+                       size = <0 0x10000000>;
+                       linux,cma-default;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_leds>;
+
+               led-0 {
+                       color = <LED_COLOR_ID_GREEN>;
+                       function = LED_FUNCTION_HEARTBEAT;
+                       gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
+                       linux,default-trigger = "heartbeat";
+               };
+       };
+};
+
+/* Ethernet */
+&fec {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_fec>;
+       phy-mode = "rmii";
+       phy-handle = <&ethphy1>;
+       fsl,magic-packet;
+       assigned-clocks = <&clk IMX93_CLK_ENET_TIMER1>,
+                         <&clk IMX93_CLK_ENET_REF>,
+                         <&clk IMX93_CLK_ENET_REF_PHY>;
+       assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
+                                <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
+                                <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
+       assigned-clock-rates = <100000000>, <50000000>, <50000000>;
+       status = "okay";
+
+       mdio: mdio {
+               clock-frequency = <5000000>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               ethphy1: ethernet-phy@1 {
+                       compatible = "ethernet-phy-ieee802.3-c22";
+                       reg = <1>;
+               };
+       };
+};
+
+/* eMMC */
+&usdhc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc1>;
+       bus-width = <8>;
+       non-removable;
+       status = "okay";
+};
+
+/* Watchdog */
+&wdog3 {
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl_fec: fecgrp {
+               fsl,pins = <
+                       MX93_PAD_ENET2_MDC__ENET1_MDC                   0x50e
+                       MX93_PAD_ENET2_MDIO__ENET1_MDIO                 0x502
+                       MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0             0x57e
+                       MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1             0x57e
+                       MX93_PAD_ENET2_RXC__ENET1_RX_ER                 0x5fe
+                       MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL       0x57e
+                       MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0             0x50e
+                       MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1             0x50e
+                       MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL       0x50e
+                       MX93_PAD_ENET2_TD2__ENET1_TX_CLK                0x4000050e
+               >;
+       };
+
+       pinctrl_leds: ledsgrp {
+               fsl,pins = <
+                       MX93_PAD_I2C1_SDA__GPIO1_IO01           0x31e
+               >;
+       };
+
+       pinctrl_usdhc1: usdhc1grp {
+               fsl,pins = <
+                       MX93_PAD_SD1_CLK__USDHC1_CLK            0x179e
+                       MX93_PAD_SD1_CMD__USDHC1_CMD            0x1386
+                       MX93_PAD_SD1_DATA0__USDHC1_DATA0        0x138e
+                       MX93_PAD_SD1_DATA1__USDHC1_DATA1        0x1386
+                       MX93_PAD_SD1_DATA2__USDHC1_DATA2        0x138e
+                       MX93_PAD_SD1_DATA3__USDHC1_DATA3        0x1386
+                       MX93_PAD_SD1_DATA4__USDHC1_DATA4        0x1386
+                       MX93_PAD_SD1_DATA5__USDHC1_DATA5        0x1386
+                       MX93_PAD_SD1_DATA6__USDHC1_DATA6        0x1386
+                       MX93_PAD_SD1_DATA7__USDHC1_DATA7        0x1386
+                       MX93_PAD_SD1_STROBE__USDHC1_STROBE      0x179e
+               >;
+       };
+};