ARM: dts: arm: Fix SP805 clocks
authorAndre Przywara <andre.przywara@arm.com>
Fri, 28 Aug 2020 13:05:59 +0000 (14:05 +0100)
committerSudeep Holla <sudeep.holla@arm.com>
Mon, 7 Sep 2020 09:54:08 +0000 (10:54 +0100)
The SP805 binding sets the name for the actual watchdog clock to
"wdog_clk" (with an underscore).

Change the name in the DTs for ARM Ltd. platforms to match that. The
Linux and U-Boot driver use the *first* clock for this purpose anyway,
so it does not break anything.

For MPS2 we only specify one clock so far, but the binding requires
two clocks to be named.

In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency. So since currently both
are the very same clock, we can just double the clock reference, and add
the correct clock-names, to match the binding.

Link: https://lore.kernel.org/r/20200828130602.42203-8-andre.przywara@arm.com
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
arch/arm/boot/dts/arm-realview-eb.dtsi
arch/arm/boot/dts/arm-realview-pb11mp.dts
arch/arm/boot/dts/arm-realview-pbx.dtsi
arch/arm/boot/dts/mps2.dtsi
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
arch/arm/boot/dts/vexpress-v2m.dtsi
arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
arch/arm/boot/dts/vexpress-v2p-ca9.dts

index fe0207b88053d3971e851ace3d2c1d10697b3ff4..a534a8e444d9dbda7313a5a51a2414d80889a708 100644 (file)
                        compatible = "arm,sp805", "arm,primecell";
                        reg = <0x10010000 0x1000>;
                        clocks = <&wdogclk>, <&pclk>;
-                       clock-names = "wdogclk", "apb_pclk";
+                       clock-names = "wdog_clk", "apb_pclk";
                        status = "disabled";
                };
 
index 564e2eee2c24c0f123c8eb943e4ed407cb6f8775..0c7dabef4a5f72e89a6ce6e6515a2d74af5ee040 100644 (file)
                        interrupt-parent = <&intc_pb11mp>;
                        interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&wdogclk>, <&pclk>;
-                       clock-names = "wdogclk", "apb_pclk";
+                       clock-names = "wdog_clk", "apb_pclk";
                        status = "disabled";
                };
 
                        interrupt-parent = <&intc_pb11mp>;
                        interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&wdogclk>, <&pclk>;
-                       clock-names = "wdogclk", "apb_pclk";
+                       clock-names = "wdog_clk", "apb_pclk";
                };
 
                timer01: timer@10011000 {
index f61bd59ae5bae2927388d7ff95380c4664594989..ac95667ed7812948f6528265163fc1bf5bc824d1 100644 (file)
                        compatible = "arm,sp805", "arm,primecell";
                        reg = <0x1000f000 0x1000>;
                        clocks = <&wdogclk>, <&pclk>;
-                       clock-names = "wdogclk", "apb_pclk";
+                       clock-names = "wdog_clk", "apb_pclk";
                        status = "disabled";
                };
 
                        compatible = "arm,sp805", "arm,primecell";
                        reg = <0x10010000 0x1000>;
                        clocks = <&wdogclk>, <&pclk>;
-                       clock-names = "wdogclk", "apb_pclk";
+                       clock-names = "wdog_clk", "apb_pclk";
                        status = "disabled";
                };
 
index 48c34fa282afcad97cee7f9de03972b47ae33f01..37f5023f529cdcd31a73c36820d5828502449067 100644 (file)
                                arm,primecell-periphid = <0x00141805>;
                                reg = <0x8000 0x1000>;
                                interrupts = <0>;
-                               clocks = <&sysclk>;
-                               clock-names = "apb_pclk";
+                               clocks = <&sysclk>, <&sysclk>;
+                               clock-names = "wdog_clk", "apb_pclk";
                                status = "disabled";
                        };
                };
index a88ee5294d3550959c9722f726cec4d5d60cc655..4f7220b11f2d7a9376fc9e6ed32039eddf2a57e7 100644 (file)
                                        reg = <0x0f0000 0x1000>;
                                        interrupts = <0>;
                                        clocks = <&v2m_refclk32khz>, <&smbclk>;
-                                       clock-names = "wdogclk", "apb_pclk";
+                                       clock-names = "wdog_clk", "apb_pclk";
                                };
 
                                v2m_timer01: timer@110000 {
index 5e48b641068ad83806efa45c93f31dc6d680b0ca..2ac41ed3a57c7d6bc2c28df8d05c6850e27022b6 100644 (file)
                                        reg = <0x0f000 0x1000>;
                                        interrupts = <0>;
                                        clocks = <&v2m_refclk32khz>, <&smbclk>;
-                                       clock-names = "wdogclk", "apb_pclk";
+                                       clock-names = "wdog_clk", "apb_pclk";
                                };
 
                                v2m_timer01: timer@11000 {
index f82fa34c90bec085199780c7b033b34f61683c3b..e63c5c0bfb43f03683c5a01048f563719f96073e 100644 (file)
@@ -87,8 +87,8 @@
                status = "disabled";
                reg = <0 0x2b060000 0 0x1000>;
                interrupts = <0 98 4>;
-               clocks = <&sys_pll>;
-               clock-names = "apb_pclk";
+               clocks = <&sys_pll>, <&sys_pll>;
+               clock-names = "wdog_clk", "apb_pclk";
        };
 
        gic: interrupt-controller@2c001000 {
index 3ac95a179452cb54bb7b34cc1c22d34bbaf6d25e..012d40a7228c14293588d99fc8e6466ab7542ee4 100644 (file)
                reg = <0 0x2a490000 0 0x1000>;
                interrupts = <0 98 4>;
                clocks = <&oscclk6a>, <&oscclk6a>;
-               clock-names = "wdogclk", "apb_pclk";
+               clock-names = "wdog_clk", "apb_pclk";
        };
 
        hdlcd@2b000000 {
index 6cddea25a292ac990e6f25ec7cd9ad482f0ca298..4c58479558562a5fa347bbe46bbb6fee280e8f03 100644 (file)
                reg = <0x100e5000 0x1000>;
                interrupts = <0 51 4>;
                clocks = <&oscclk2>, <&oscclk2>;
-               clock-names = "wdogclk", "apb_pclk";
+               clock-names = "wdog_clk", "apb_pclk";
        };
 
        scu@1e000000 {