drm/amdgpu: enable GFX Power Gating for GC IP v11.0.4

Enable GFX Power Gating control for GC IP v11.0.4.

Signed-off-by: Tim Huang <tim.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index bf78440e1e704dad5ec7a1037c51f50c7c7fa238..506c285d5f49d4fec5a1deda3a41150140f859f6 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -5058,6 +5058,7 @@ static void gfx_v11_cntl_power_gating(struct amdgpu_device *adev, bool enable)
        if (enable && (adev->pg_flags & AMD_PG_SUPPORT_GFX_PG)) {
                switch (adev->ip_versions[GC_HWIP][0]) {
                case IP_VERSION(11, 0, 1):
+               case IP_VERSION(11, 0, 4):
                        WREG32_SOC15(GC, 0, regRLC_PG_DELAY_3, RLC_PG_DELAY_3_DEFAULT_GC_11_0_1);
                        break;
                default:
@@ -5091,6 +5092,7 @@ static int gfx_v11_0_set_powergating_state(void *handle,
                amdgpu_gfx_off_ctrl(adev, enable);
                break;
        case IP_VERSION(11, 0, 1):
+       case IP_VERSION(11, 0, 4):
                gfx_v11_cntl_pg(adev, enable);
                amdgpu_gfx_off_ctrl(adev, enable);
                break;