ARM: zynq: dts: Setting default i2c clock frequency to 400kHz

Setting default i2c clock frequency for Zynq to maximum rate of 400kHz.
Current default value is 100kHz.

Signed-off-by: Varalaxmi Bingi <varalaxmi.bingi@amd.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4dde5d1eb8e4572dae4295a19a4c83002a58e5da.1683035611.git.michal.simek@amd.com

diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index cd9931f6bcbdc4b71327a435970533fc752095c9..a7db3f3009f2a3ea12530a4168c040c3b99b5889 100644 (file)
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -149,6 +149,7 @@
                        clocks = <&clkc 38>;
                        interrupt-parent = <&intc>;
                        interrupts = <0 25 4>;
+                       clock-frequency = <400000>;
                        reg = <0xe0004000 0x1000>;
                        #address-cells = <1>;
                        #size-cells = <0>;
@@ -160,6 +161,7 @@
                        clocks = <&clkc 39>;
                        interrupt-parent = <&intc>;
                        interrupts = <0 48 4>;
+                       clock-frequency = <400000>;
                        reg = <0xe0005000 0x1000>;
                        #address-cells = <1>;
                        #size-cells = <0>;