IntelHDAStream st[8];
/* state */
+ MemoryRegion container;
MemoryRegion mmio;
+ MemoryRegion alias;
uint32_t rirb_count;
int64_t wall_base_ns;
.offset = offsetof(IntelHDAState, wall_clk),
.rhandler = intel_hda_get_wall_clk,
},
- [ ICH6_REG_WALLCLK + 0x2000 ] = {
- .name = "WALLCLK(alias)",
- .size = 4,
- .offset = offsetof(IntelHDAState, wall_clk),
- .rhandler = intel_hda_get_wall_clk,
- },
/* dma engine */
[ ICH6_REG_CORBLBASE ] = {
.size = 4, \
.offset = offsetof(IntelHDAState, st[_i].lpib), \
}, \
- [ ST_REG(_i, ICH6_REG_SD_LPIB) + 0x2000 ] = { \
- .stream = _i, \
- .name = _t stringify(_i) " LPIB(alias)", \
- .size = 4, \
- .offset = offsetof(IntelHDAState, st[_i].lpib), \
- }, \
[ ST_REG(_i, ICH6_REG_SD_CBL) ] = { \
.stream = _i, \
.name = _t stringify(_i) " CBL", \
error_free(err);
}
+ memory_region_init(&d->container, OBJECT(d),
+ "intel-hda-container", 0x4000);
memory_region_init_io(&d->mmio, OBJECT(d), &intel_hda_mmio_ops, d,
- "intel-hda", 0x4000);
- pci_register_bar(&d->pci, 0, 0, &d->mmio);
+ "intel-hda", 0x2000);
+ memory_region_add_subregion(&d->container, 0x0000, &d->mmio);
+ memory_region_init_alias(&d->alias, OBJECT(d), "intel-hda-alias",
+ &d->mmio, 0, 0x2000);
+ memory_region_add_subregion(&d->container, 0x2000, &d->alias);
+ pci_register_bar(&d->pci, 0, 0, &d->container);
hda_codec_bus_init(DEVICE(pci), &d->codecs, sizeof(d->codecs),
intel_hda_response, intel_hda_xfer);