powerpc/85xx: Fix typo in code comment
authorDario Binacchi <dario.binacchi@amarulasolutions.com>
Fri, 24 Nov 2023 10:02:37 +0000 (11:02 +0100)
committerMichael Ellerman <mpe@ellerman.id.au>
Fri, 1 Dec 2023 10:15:33 +0000 (21:15 +1100)
s/singals/signals/

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20231124100241.660374-1-dario.binacchi@amarulasolutions.com
arch/powerpc/platforms/85xx/mpc85xx_rdb.c

index ec9f60fbebc71e04b335edde627576ab4d60e2b9..e0cec670d8dbc95569b7303ac33bc504130e3b3b 100644 (file)
@@ -76,7 +76,7 @@ static void __init mpc85xx_rdb_setup_arch(void)
                        /* P1025 has pins muxed for QE and other functions. To
                        * enable QE UEC mode, we need to set bit QE0 for UCC1
                        * in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9
-                       * and QE12 for QE MII management singals in PMUXCR
+                       * and QE12 for QE MII management signals in PMUXCR
                        * register.
                        */
                                setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |