rtw89: 8852c: add setting of TB UL TX power offset

Configure this TX power to indicate TX power offset that uses to transmit
TB (trigger base) uplink frames.
Also, shrink the unit of TX power offset changes to suitable type s8.

Signed-off-by: Yuan-Han Zhang <yuanhan1020@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20220317055543.40514-4-pkshih@realtek.com

diff --git a/drivers/net/wireless/realtek/rtw89/core.h b/drivers/net/wireless/realtek/rtw89/core.h
index 51c99e50b0ed93b2e4042000db5dcd5b00eced16..af73347c40b166e94fce94590eb33ec37a1af8e5 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/core.h
+++ b/drivers/net/wireless/realtek/rtw89/core.h
@@ -2065,7 +2065,7 @@ struct rtw89_chip_ops {
                           struct ieee80211_rx_status *status);
        void (*bb_ctrl_btc_preagc)(struct rtw89_dev *rtwdev, bool bt_en);
        void (*set_txpwr_ul_tb_offset)(struct rtw89_dev *rtwdev,
-                                      s16 pw_ofst, enum rtw89_mac_idx mac_idx);
+                                      s8 pw_ofst, enum rtw89_mac_idx mac_idx);
        int (*pwr_on_func)(struct rtw89_dev *rtwdev);
        int (*pwr_off_func)(struct rtw89_dev *rtwdev);
 

diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h
index a239bf017ac7693fbf0d2da5d7451d761cd6ed64..09bf3afd6d9f5e9fce7c9ca0bbe45cbdfa6fe9a5 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/reg.h
+++ b/drivers/net/wireless/realtek/rtw89/reg.h
@@ -1525,8 +1525,10 @@
 #define B_AX_PWR_UL_TB_CTRL_EN BIT(31)
 #define R_AX_PWR_UL_TB_1T 0xD28C
 #define B_AX_PWR_UL_TB_1T_MASK GENMASK(4, 0)
+#define B_AX_PWR_UL_TB_1T_V1_MASK GENMASK(7, 0)
 #define R_AX_PWR_UL_TB_2T 0xD290
 #define B_AX_PWR_UL_TB_2T_MASK GENMASK(4, 0)
+#define B_AX_PWR_UL_TB_2T_V1_MASK GENMASK(7, 0)
 #define R_AX_PWR_BY_RATE_TABLE0 0xD2C0
 #define R_AX_PWR_BY_RATE_TABLE10 0xD2E8
 #define R_AX_PWR_BY_RATE R_AX_PWR_BY_RATE_TABLE0

diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852a.c b/drivers/net/wireless/realtek/rtw89/rtw8852a.c
index 392f6e6e0a1326c6e1b5f3fe4eac3b409ec34586..c6986c64981388bcfbe4fbb5cbc35786563b736e 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c
+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c
@@ -1275,10 +1275,10 @@ static u32 rtw8852a_bb_cal_txpwr_ref(struct rtw89_dev *rtwdev,
 
 static
 void rtw8852a_set_txpwr_ul_tb_offset(struct rtw89_dev *rtwdev,
-                                    s16 pw_ofst, enum rtw89_mac_idx mac_idx)
+                                    s8 pw_ofst, enum rtw89_mac_idx mac_idx)
 {
-       s32 val_1t = 0;
-       s32 val_2t = 0;
+       s8 val_1t = 0;
+       s8 val_2t = 0;
        u32 reg;
 
        if (pw_ofst < -16 || pw_ofst > 15) {
@@ -1288,7 +1288,7 @@ void rtw8852a_set_txpwr_ul_tb_offset(struct rtw89_dev *rtwdev,
        }
        reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_CTRL, mac_idx);
        rtw89_write32_set(rtwdev, reg, B_AX_PWR_UL_TB_CTRL_EN);
-       val_1t = (s32)pw_ofst;
+       val_1t = pw_ofst;
        reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_1T, mac_idx);
        rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_1T_MASK, val_1t);
        val_2t = max(val_1t - 3, -16);

diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852c.c b/drivers/net/wireless/realtek/rtw89/rtw8852c.c
index f37acfe7679e1f827397a535c487ad8dcd3a21b8..c74dedea511a40d5ce7af9ad60afaa9513a9807e 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c
+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c
@@ -445,10 +445,46 @@ static void rtw8852c_power_trim(struct rtw89_dev *rtwdev)
        rtw8852c_pa_bias_trim(rtwdev);
 }
 
+static
+void rtw8852c_set_txpwr_ul_tb_offset(struct rtw89_dev *rtwdev,
+                                    s8 pw_ofst, enum rtw89_mac_idx mac_idx)
+{
+       s8 pw_ofst_2tx;
+       s8 val_1t;
+       s8 val_2t;
+       u32 reg;
+       u8 i;
+
+       if (pw_ofst < -32 || pw_ofst > 31) {
+               rtw89_warn(rtwdev, "[ULTB] Err pwr_offset=%d\n", pw_ofst);
+               return;
+       }
+       val_1t = pw_ofst << 2;
+       pw_ofst_2tx = max(pw_ofst - 3, -32);
+       val_2t = pw_ofst_2tx << 2;
+
+       rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[ULTB] val_1tx=0x%x\n", val_1t);
+       rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[ULTB] val_2tx=0x%x\n", val_2t);
+
+       for (i = 0; i < 4; i++) {
+               /* 1TX */
+               reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_1T, mac_idx);
+               rtw89_write32_mask(rtwdev, reg,
+                                  B_AX_PWR_UL_TB_1T_V1_MASK << (8 * i),
+                                  val_1t);
+               /* 2TX */
+               reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_2T, mac_idx);
+               rtw89_write32_mask(rtwdev, reg,
+                                  B_AX_PWR_UL_TB_2T_V1_MASK << (8 * i),
+                                  val_2t);
+       }
+}
+
 static const struct rtw89_chip_ops rtw8852c_chip_ops = {
        .read_efuse             = rtw8852c_read_efuse,
        .read_phycap            = rtw8852c_read_phycap,
        .power_trim             = rtw8852c_power_trim,
+       .set_txpwr_ul_tb_offset = rtw8852c_set_txpwr_ul_tb_offset,
        .pwr_on_func            = rtw8852c_pwr_on_func,
        .pwr_off_func           = rtw8852c_pwr_off_func,
 };