* Author: Mathieu Poirier <mathieu.poirier@linaro.org>
  */
 
+#include <linux/bitfield.h>
 #include <linux/coresight.h>
 #include <linux/coresight-pmu.h>
 #include <linux/cpumask.h>
        struct perf_output_handle *handle = &ctxt->handle;
        struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
        struct list_head *path;
+       u64 hw_id;
 
        if (!csdev)
                goto fail;
        if (source_ops(csdev)->enable(csdev, event, CS_MODE_PERF))
                goto fail_disable_path;
 
+       /* output cpu / trace ID in perf record */
+       hw_id = FIELD_PREP(CS_AUX_HW_ID_VERSION_MASK, CS_AUX_HW_ID_CURR_VERSION);
+       hw_id |= FIELD_PREP(CS_AUX_HW_ID_TRACE_ID_MASK, coresight_trace_id_read_cpu_id(cpu));
+       perf_report_aux_output_id(event, hw_id);
+
 out:
        /* Tell the perf core the event is alive */
        event->hw.state = 0;
 
 #ifndef _LINUX_CORESIGHT_PMU_H
 #define _LINUX_CORESIGHT_PMU_H
 
+#include <linux/bits.h>
+
 #define CORESIGHT_ETM_PMU_NAME "cs_etm"
 
 /*
 #define ETM4_CFG_BIT_RETSTK    12
 #define ETM4_CFG_BIT_VMID_OPT  15
 
+/*
+ * Interpretation of the PERF_RECORD_AUX_OUTPUT_HW_ID payload.
+ * Used to associate a CPU with the CoreSight Trace ID.
+ * [07:00] - Trace ID - uses 8 bits to make value easy to read in file.
+ * [59:08] - Unused (SBZ)
+ * [63:60] - Version
+ */
+#define CS_AUX_HW_ID_TRACE_ID_MASK     GENMASK_ULL(7, 0)
+#define CS_AUX_HW_ID_VERSION_MASK      GENMASK_ULL(63, 60)
+
+#define CS_AUX_HW_ID_CURR_VERSION 0
+
 #endif