arm64: dts: qcom: sm8150: add i2c and spi dma channels
authorFelipe Balbi <felipe.balbi@microsoft.com>
Thu, 16 Dec 2021 12:43:48 +0000 (14:43 +0200)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Tue, 1 Feb 2022 00:18:04 +0000 (18:18 -0600)
By listing relevant DMA channels for the various QUPv3 instances, we
can work on adding support for DMA to the respective drivers.

Signed-off-by: Felipe Balbi <felipe.balbi@microsoft.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211216124348.370059-1-balbi@kernel.org
arch/arm64/boot/dts/qcom/sm8150.dtsi

index c1067b31b2995d8bceb6f7b8494a025f204b5680..e680c32371c060852585fbe77f9acbcc725c887e 100644 (file)
                                reg = <0 0x00880000 0 0x4000>;
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
+                               dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>,
+                                      <&gpi_dma0 1 0 QCOM_GPI_I2C>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_i2c0_default>;
                                interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
                                reg-names = "se";
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
+                               dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>,
+                                      <&gpi_dma0 1 0 QCOM_GPI_SPI>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_spi0_default>;
                                interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0 0x00884000 0 0x4000>;
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
+                               dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
+                                      <&gpi_dma0 1 1 QCOM_GPI_I2C>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_i2c1_default>;
                                interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
                                reg-names = "se";
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
+                               dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
+                                      <&gpi_dma0 1 1 QCOM_GPI_SPI>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_spi1_default>;
                                interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0 0x00888000 0 0x4000>;
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
+                               dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>,
+                                      <&gpi_dma0 1 2 QCOM_GPI_I2C>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_i2c2_default>;
                                interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
                                reg-names = "se";
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
+                               dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>,
+                                      <&gpi_dma0 1 2 QCOM_GPI_SPI>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_spi2_default>;
                                interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0 0x0088c000 0 0x4000>;
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
+                               dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>,
+                                      <&gpi_dma0 1 3 QCOM_GPI_I2C>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_i2c3_default>;
                                interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
                                reg-names = "se";
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
+                               dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>,
+                                      <&gpi_dma0 1 3 QCOM_GPI_SPI>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_spi3_default>;
                                interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0 0x00890000 0 0x4000>;
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
+                               dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>,
+                                      <&gpi_dma0 1 4 QCOM_GPI_I2C>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_i2c4_default>;
                                interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
                                reg-names = "se";
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
+                               dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>,
+                                      <&gpi_dma0 1 4 QCOM_GPI_SPI>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_spi4_default>;
                                interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0 0x00894000 0 0x4000>;
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
+                               dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>,
+                                      <&gpi_dma0 1 5 QCOM_GPI_I2C>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_i2c5_default>;
                                interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
                                reg-names = "se";
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
+                               dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>,
+                                      <&gpi_dma0 1 5 QCOM_GPI_SPI>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_spi5_default>;
                                interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0 0x00898000 0 0x4000>;
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
+                               dmas = <&gpi_dma0 0 6 QCOM_GPI_I2C>,
+                                      <&gpi_dma0 1 6 QCOM_GPI_I2C>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_i2c6_default>;
                                interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;
                                reg-names = "se";
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
+                               dmas = <&gpi_dma0 0 6 QCOM_GPI_SPI>,
+                                      <&gpi_dma0 1 6 QCOM_GPI_SPI>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_spi6_default>;
                                interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0 0x0089c000 0 0x4000>;
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
+                               dmas = <&gpi_dma0 0 7 QCOM_GPI_I2C>,
+                                      <&gpi_dma0 1 7 QCOM_GPI_I2C>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_i2c7_default>;
                                interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;
                                reg-names = "se";
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
+                               dmas = <&gpi_dma0 0 7 QCOM_GPI_SPI>,
+                                      <&gpi_dma0 1 7 QCOM_GPI_SPI>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_spi7_default>;
                                interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0 0x00a80000 0 0x4000>;
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
+                               dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>,
+                                      <&gpi_dma1 1 0 QCOM_GPI_I2C>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_i2c8_default>;
                                interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
                                reg-names = "se";
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
+                               dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>,
+                                      <&gpi_dma1 1 0 QCOM_GPI_SPI>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_spi8_default>;
                                interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0 0x00a84000 0 0x4000>;
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
+                               dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
+                                      <&gpi_dma1 1 1 QCOM_GPI_I2C>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_i2c9_default>;
                                interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
                                reg-names = "se";
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
+                               dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
+                                      <&gpi_dma1 1 1 QCOM_GPI_SPI>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_spi9_default>;
                                interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0 0x00a88000 0 0x4000>;
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
+                               dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>,
+                                      <&gpi_dma1 1 2 QCOM_GPI_I2C>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_i2c10_default>;
                                interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
                                reg-names = "se";
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
+                               dmas = <&gpi_dma1 0 2 QCOM_GPI_SPI>,
+                                      <&gpi_dma1 1 2 QCOM_GPI_SPI>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_spi10_default>;
                                interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0 0x00a8c000 0 0x4000>;
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
+                               dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>,
+                                      <&gpi_dma1 1 3 QCOM_GPI_I2C>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_i2c11_default>;
                                interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
                                reg-names = "se";
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
+                               dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>,
+                                      <&gpi_dma1 1 3 QCOM_GPI_SPI>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_spi11_default>;
                                interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0 0x00a90000 0 0x4000>;
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
+                               dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>,
+                                      <&gpi_dma1 1 4 QCOM_GPI_I2C>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_i2c12_default>;
                                interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
                                reg-names = "se";
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
+                               dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>,
+                                      <&gpi_dma1 1 4 QCOM_GPI_SPI>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_spi12_default>;
                                interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0 0x0094000 0 0x4000>;
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
+                               dmas = <&gpi_dma2 0 5 QCOM_GPI_I2C>,
+                                      <&gpi_dma2 1 5 QCOM_GPI_I2C>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_i2c16_default>;
                                interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
                                reg-names = "se";
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
+                               dmas = <&gpi_dma2 0 5 QCOM_GPI_SPI>,
+                                      <&gpi_dma2 1 5 QCOM_GPI_SPI>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_spi16_default>;
                                interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0 0x00c80000 0 0x4000>;
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>;
+                               dmas = <&gpi_dma2 0 0 QCOM_GPI_I2C>,
+                                      <&gpi_dma2 1 0 QCOM_GPI_I2C>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_i2c17_default>;
                                interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
                                reg-names = "se";
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>;
+                               dmas = <&gpi_dma2 0 0 QCOM_GPI_SPI>,
+                                      <&gpi_dma2 1 0 QCOM_GPI_SPI>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_spi17_default>;
                                interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0 0x00c84000 0 0x4000>;
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>;
+                               dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>,
+                                      <&gpi_dma2 1 1 QCOM_GPI_I2C>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_i2c18_default>;
                                interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>;
                                reg-names = "se";
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>;
+                               dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>,
+                                      <&gpi_dma2 1 1 QCOM_GPI_SPI>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_spi18_default>;
                                interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0 0x00c88000 0 0x4000>;
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>;
+                               dmas = <&gpi_dma2 0 2 QCOM_GPI_I2C>,
+                                      <&gpi_dma2 1 2 QCOM_GPI_I2C>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_i2c19_default>;
                                interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>;
                                reg-names = "se";
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>;
+                               dmas = <&gpi_dma2 0 2 QCOM_GPI_SPI>,
+                                      <&gpi_dma2 1 2 QCOM_GPI_SPI>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_spi19_default>;
                                interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0 0x00c8c000 0 0x4000>;
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>;
+                               dmas = <&gpi_dma2 0 3 QCOM_GPI_I2C>,
+                                      <&gpi_dma2 1 3 QCOM_GPI_I2C>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_i2c13_default>;
                                interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>;
                                reg-names = "se";
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>;
+                               dmas = <&gpi_dma2 0 3 QCOM_GPI_SPI>,
+                                      <&gpi_dma2 1 3 QCOM_GPI_SPI>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_spi13_default>;
                                interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0 0x00c90000 0 0x4000>;
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>;
+                               dmas = <&gpi_dma2 0 4 QCOM_GPI_I2C>,
+                                      <&gpi_dma2 1 4 QCOM_GPI_I2C>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_i2c14_default>;
                                interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>;
                                reg-names = "se";
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>;
+                               dmas = <&gpi_dma2 0 4 QCOM_GPI_SPI>,
+                                      <&gpi_dma2 1 4 QCOM_GPI_SPI>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_spi14_default>;
                                interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0 0x00c94000 0 0x4000>;
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
+                               dmas = <&gpi_dma2 0 5 QCOM_GPI_I2C>,
+                                      <&gpi_dma2 1 5 QCOM_GPI_I2C>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_i2c15_default>;
                                interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>;
                                reg-names = "se";
                                clock-names = "se";
                                clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
+                               dmas = <&gpi_dma2 0 5 QCOM_GPI_SPI>,
+                                      <&gpi_dma2 1 5 QCOM_GPI_SPI>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_spi15_default>;
                                interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>;