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clk: mmp: pxa168: add new clocks for peripherals
author
Doug Brown
<doug@schmorgal.com>
Sun, 12 Jun 2022 19:29:29 +0000
(12:29 -0700)
committer
Stephen Boyd
<sboyd@kernel.org>
Fri, 30 Sep 2022 20:34:06 +0000
(13:34 -0700)
This commit adds three new clocks that previously didn't exist, but are
needed in order to match the clock parenting as described in the PXA168
datasheet.
Signed-off-by: Doug Brown <doug@schmorgal.com>
Link:
https://lore.kernel.org/r/20220612192937.162952-5-doug@schmorgal.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/mmp/clk-of-pxa168.c
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diff --git
a/drivers/clk/mmp/clk-of-pxa168.c
b/drivers/clk/mmp/clk-of-pxa168.c
index 88b5200262d9c37a873eb7fe0085c479359d1bb0..2526d56a450b3527c163a994f989308c0bac34a5 100644
(file)
--- a/
drivers/clk/mmp/clk-of-pxa168.c
+++ b/
drivers/clk/mmp/clk-of-pxa168.c
@@
-91,6
+91,9
@@
static struct mmp_param_fixed_factor_clk fixed_factor_clks[] = {
{PXA168_CLK_PLL1_13_1_5, "pll1_13_1_5", "pll1_13", 1, 5, 0},
{PXA168_CLK_PLL1_2_1_5, "pll1_2_1_5", "pll1_2", 1, 5, 0},
{PXA168_CLK_PLL1_3_16, "pll1_3_16", "pll1", 3, 16, 0},
+ {PXA168_CLK_PLL1_2_1_10, "pll1_2_1_10", "pll1_2", 1, 10, 0},
+ {PXA168_CLK_PLL1_2_3_16, "pll1_2_3_16", "pll1_2", 3, 16, 0},
+ {PXA168_CLK_CLK32_2, "clk32_2", "clk32", 1, 2, 0},
};
static struct mmp_clk_factor_masks uart_factor_masks = {