mtd: rawnand: meson: initialize clock register

Clock register must be also initialized during controller probing. If
this is not performed (for example by bootloader before) - controller
will not work.

Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20231120064239.3304108-1-avkrasnov@salutedevices.com

diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c
index 71ec4052e52a689d056aff07802dde7b738f74ef..7e16a13fb438039bd218cd4768a7a8b844f46ce9 100644 (file)
--- a/drivers/mtd/nand/raw/meson_nand.c
+++ b/drivers/mtd/nand/raw/meson_nand.c
@@ -90,6 +90,8 @@
 
 /* eMMC clock register, misc control */
 #define CLK_SELECT_NAND                BIT(31)
+#define CLK_ALWAYS_ON_NAND     BIT(24)
+#define CLK_SELECT_FIX_PLL2    BIT(6)
 
 #define NFC_CLK_CYCLE          6
 
@@ -1154,7 +1156,7 @@ static int meson_nfc_clk_init(struct meson_nfc *nfc)
                return PTR_ERR(nfc->nand_clk);
 
        /* init SD_EMMC_CLOCK to sane defaults w/min clock rate */
-       writel(CLK_SELECT_NAND | readl(nfc->reg_clk),
+       writel(CLK_ALWAYS_ON_NAND | CLK_SELECT_NAND | CLK_SELECT_FIX_PLL2,
               nfc->reg_clk);
 
        ret = clk_prepare_enable(nfc->core_clk);