status = "disabled";
        };
 
+       i2s3_2ch: i2s@fe430000 {
+               compatible = "rockchip,rk3568-i2s-tdm";
+               reg = <0x0 0xfe430000 0x0 0x1000>;
+               interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru MCLK_I2S3_2CH_TX>, <&cru MCLK_I2S3_2CH_RX>,
+                        <&cru HCLK_I2S3_2CH>;
+               clock-names = "mclk_tx", "mclk_rx", "hclk";
+               dmas = <&dmac1 6>, <&dmac1 7>;
+               dma-names = "tx", "rx";
+               resets = <&cru SRST_M_I2S3_2CH_TX>, <&cru SRST_M_I2S3_2CH_RX>;
+               reset-names = "tx-m", "rx-m";
+               rockchip,grf = <&grf>;
+               #sound-dai-cells = <0>;
+               status = "disabled";
+       };
+
        dmac0: dmac@fe530000 {
                compatible = "arm,pl330", "arm,primecell";
                reg = <0x0 0xfe530000 0x0 0x4000>;